re-touch:More than 16 layers

On 09.05.2016 17:54, Jorge Garcia wrote:

As you mention here, the users that require more than 16 layers

generally use another tool. Getting them to switch to EAGLE even if it

did support the appropriate design elements would not be a given. It

goes back to figuring out a way to include these factors into the

decisions for feature implementations.

 

I'm going to think about this for a bit. If anyone has any ideas I'm all

ears.

I think you have the potential to grab new users simply by pricing.

Afaik there is no tools that allows >16 layers even near Eagle's cost. I

don't know (care) if KiCad can do this, but I definitely do not trust it

when it comes to large designs. Of course I'm tempted to have a go at

it, but now the time doesnt allow that. Even if I did look into

alternate tools, it would have to be as open as eagle when it comes to

data user-processing, wich eagle rules with the ULP.

 

That last statement is a self-fulfilling prophecy.  Most people who think

they will have boards that approach and may exceed 16 layers simply choose

another CAD package.  They aren't going to even consider EAGLE since they

can't be sure that it will be able to handle their full requirements.

 

That's the wrong question to ask.  The question to ask is how much market

share can we add by increasing the number of layers i.e. how many people

would choose EAGLE IF it supported more layers.  But that question misses

too.

Hi James,

You bring up a very valid point, however addressing it is difficult. How

could we even gauge how much market share we could capture without it

eventually turning into just a wild guess?

I personally like the idea of the additional layers, I don't think the

breaking of old scripts and ULPs is enough of a deterrent to the feature.

I guess the key point here would be how we can further strengthen the

argument for more layers in EAGLE. I'm not clear on how we could do

that. I'm open to suggestions though

  If you are routing 16+ layers then you most likely have many, many

differential pairs and a bunch of length matching (like Morten's board

above).

The few boards that have come through my hands requiring more than

sixteen layers have been due to a large number of GND and POWER plane

layers for shielding. I agree that Morten's use case is probably more

common.

  Until you have true, polished support for those design elements no

one is going to choose EAGLE for those types of boards--the effort is

simply too big when other tools do a lot to help.  So you have to address

ALL of the design elements and then someone can consider EAGLE.  Until that

happens you can't use stats from your current user base to see what support

it would have because your current user base choose EAGLE in spite of it

not supporting these requirements--so obviously they don't think it's

important.

As you mention here, the users that require more than 16 layers

generally use another tool. Getting them to switch to EAGLE even if it

did support the appropriate design elements would not be a given. It

goes back to figuring out a way to include these factors into the

decisions for feature implementations.

I'm going to think about this for a bit. If anyone has any ideas I'm all

ears.

Best Regards,

Jorge Garcia

CadSoft Support wrote on Wed, 04 May 2016 07:16

Am 03.05.2016 um 12:27 schrieb Morten Leikvoll:

On 02.05.2016 21:14, warrenbrayshaw wrote:

On 3/05/2016 3:28 a.m., Richard Hammerl wrote:

Am 29.04.2016 um 08:41 schrieb Morten Leikvoll:

With the project I am working on, I'm starting to feel some pain

about

the lack of more than 16 layers. I know I can most likely

virtualize

some inner gnd-only layers (cloning the gerbers) but I'd like to

ask

about the plans for this feature.

 

At the same time I know there are some challenges for the ones

that

work

with that many layers. First of all I'm thinking about polygon

processing speeds causing reluctance to do ratsnest until

absolutely

necessary, but when doing power routing, it will need frequent

fill

tests, but even doing ratsnest on a single net takes time. I wish

this

function became more "live", so airwires would appeare instantly

as you

place a via. My gut feeling as a programmer is that this is

possbile to

speed up alot.

 

 

Currently we have no fixed plans for this. But we already put

your

request into our bugzilla system as a possible feature for V8.

 

 

 

The discussion from Sept 2010 is well worth re-reading on this

subject.

Particularly James's words on the decision making process to

purchase.

http://www.eaglecentral.ca/index.php/mv/msg/38634/129058/736ed5d7e6ef3b087c

ee2f741a79e2e5/#msg_129058

 

Thanks for linking this old thread. I was the actual first one to

respond to this thread[, apparently with a too complex solution].

 

If Klaus worries are still the main worry, I have a much simpler

solution that allows Cadsoft wants to keep the old structure, and

addresses some concerns from the old thread.

 

New projects on a new buture version could have an checkable

"extended

layer" mode in the stack setup. This feature will shift layers

like

Klaus suggested in the old thread. If this checkbox is not set,

everything should work as before. When old projects are

loaded/imported,

this checkbox will ofcourse be cleared.

 

For projects in "extended layer mode", all ULP's that work with

extended

layer modes would need a "#using extended_layermode" at the top.

If an

ULP without this key is run on a board in extended mode, an error

like

"This ULP is unsuitable for extended layer mode." should pop up.

An old

ULP would run as before on a non-extended layermode design.

 

 

If you wonder why I need 16+, its because I'm working on a rather

dense

design with a 1500+ pin FPGA, more than 9 rather high current

voltage

rails (0.95V, 1.00V, 1.2v, 1.5v, 1.8v, 2.5v, 3.3v, 5v and 12v) ,

256 bit

(16x16) wide DDR4 memory at state of the art speed, 48 gigabit

tranceivers (diff lanes of 8 gigabit), and you simply dont

experiment

with layer crossing with that kind of routing, especially not whe

using

Eagle where the simulation is not built in. (Yes I do have some

ULP's to

help me out here)

I will probably manage to crowbar this in to 16 layers on this

project,

but the added comfort and time and blood saved in trial and error

would

be much valuable. Switching to a new tool is even more

painful/time

consuming. I would have to replace the man drawing it too.

 

 

We will discuss this again for V8. There would be a lot of

incompatabilities with the new additional signal layers. But we will

check Klaus' and your ideas and see what will come out. We do not have

too many customers that want to use more layers, but let's see if the

pros justify the cons.

 

 

--

Mit freundlichen Gruessen / Best regards

Richard Hammerl

  CadSoft Support -- hotline@cadsoft.de

  FAQ: http://www.cadsoft.de/training/faq/

That last statement is a self-fulfilling prophecy.  Most people who think

they will have boards that approach and may exceed 16 layers simply choose

another CAD package.  They aren't going to even consider EAGLE since they

can't be sure that it will be able to handle their full requirements.

That's the wrong question to ask.  The question to ask is how much market

share can we add by increasing the number of layers i.e. how many people

would choose EAGLE IF it supported more layers.  But that question misses

too.  If you are routing 16+ layers then you most likely have many, many

differential pairs and a bunch of length matching (like Morten's board

above).  Until you have true, polished support for those design elements no

one is going to choose EAGLE for those types of boards--the effort is

simply too big when other tools do a lot to help.  So you have to address

ALL of the design elements and then someone can consider EAGLE.  Until that

happens you can't use stats from your current user base to see what support

it would have because your current user base choose EAGLE in spite of it

not supporting these requirements--so obviously they don't think it's

important.

James.

--

James Morrison  ~~~  Stratford Digital

Order your EAGLE license from Stratford Digital at

http://www.eaglelicenses.com

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

Am 03.05.2016 um 12:27 schrieb Morten Leikvoll:

On 02.05.2016 21:14, warrenbrayshaw wrote:

On 3/05/2016 3:28 a.m., Richard Hammerl wrote:

Am 29.04.2016 um 08:41 schrieb Morten Leikvoll:

With the project I am working on, I'm starting to feel some pain about

the lack of more than 16 layers. I know I can most likely virtualize

some inner gnd-only layers (cloning the gerbers) but I'd like to ask

about the plans for this feature.

 

At the same time I know there are some challenges for the ones that

work

with that many layers. First of all I'm thinking about polygon

processing speeds causing reluctance to do ratsnest until absolutely

necessary, but when doing power routing, it will need frequent fill

tests, but even doing ratsnest on a single net takes time. I wish this

function became more "live", so airwires would appeare instantly as you

place a via. My gut feeling as a programmer is that this is possbile to

speed up alot.

 

 

Currently we have no fixed plans for this. But we already put your

request into our bugzilla system as a possible feature for V8.

 

 

 

The discussion from Sept 2010 is well worth re-reading on this subject.

Particularly James's words on the decision making process to purchase.

 

http://www.eaglecentral.ca/index.php/mv/msg/38634/129058/736ed5d7e6ef3b087cee2f741a79e2e5/#msg_129058

 

 

Thanks for linking this old thread. I was the actual first one to

respond to this thread[, apparently with a too complex solution].

 

If Klaus worries are still the main worry, I have a much simpler

solution that allows Cadsoft wants to keep the old structure, and

addresses some concerns from the old thread.

 

New projects on a new buture version could have an checkable "extended

layer" mode in the stack setup. This feature will shift layers like

Klaus suggested in the old thread. If this checkbox is not set,

everything should work as before. When old projects are loaded/imported,

this checkbox will ofcourse be cleared.

 

For projects in "extended layer mode", all ULP's that work with extended

layer modes would need a "#using extended_layermode" at the top. If an

ULP without this key is run on a board in extended mode, an error like

"This ULP is unsuitable for extended layer mode." should pop up. An old

ULP would run as before on a non-extended layermode design.

 

 

If you wonder why I need 16+, its because I'm working on a rather dense

design with a 1500+ pin FPGA, more than 9 rather high current voltage

rails (0.95V, 1.00V, 1.2v, 1.5v, 1.8v, 2.5v, 3.3v, 5v and 12v) , 256 bit

(16x16) wide DDR4 memory at state of the art speed, 48 gigabit

tranceivers (diff lanes of 8 gigabit), and you simply dont experiment

with layer crossing with that kind of routing, especially not whe using

Eagle where the simulation is not built in. (Yes I do have some ULP's to

help me out here)

I will probably manage to crowbar this in to 16 layers on this project,

but the added comfort and time and blood saved in trial and error would

be much valuable. Switching to a new tool is even more painful/time

consuming. I would have to replace the man drawing it too.

 

We will discuss this again for V8. There would be a lot of

incompatabilities with the new additional signal layers. But we will

check Klaus' and your ideas and see what will come out. We do not have

too many customers that want to use more layers, but let's see if the

pros justify the cons.

--

Mit freundlichen Gruessen / Best regards

Richard Hammerl

  CadSoft Support -- hotline@cadsoft.de

  FAQ: http://www.cadsoft.de/training/faq/

On 02.05.2016 21:14, warrenbrayshaw wrote:

On 3/05/2016 3:28 a.m., Richard Hammerl wrote:

Am 29.04.2016 um 08:41 schrieb Morten Leikvoll:

With the project I am working on, I'm starting to feel some pain about

the lack of more than 16 layers. I know I can most likely virtualize

some inner gnd-only layers (cloning the gerbers) but I'd like to ask

about the plans for this feature.

 

At the same time I know there are some challenges for the ones that work

with that many layers. First of all I'm thinking about polygon

processing speeds causing reluctance to do ratsnest until absolutely

necessary, but when doing power routing, it will need frequent fill

tests, but even doing ratsnest on a single net takes time. I wish this

function became more "live", so airwires would appeare instantly as you

place a via. My gut feeling as a programmer is that this is possbile to

speed up alot.

 

 

Currently we have no fixed plans for this. But we already put your

request into our bugzilla system as a possible feature for V8.

 

 

 

The discussion from Sept 2010 is well worth re-reading on this subject.

Particularly James's words on the decision making process to purchase.

 

http://www.eaglecentral.ca/index.php/mv/msg/38634/129058/736ed5d7e6ef3b087cee2f741a79e2e5/#msg_129058

Thanks for linking this old thread. I was the actual first one to

respond to this thread[, apparently with a too complex solution].

If Klaus worries are still the main worry, I have a much simpler

solution that allows Cadsoft wants to keep the old structure, and

addresses some concerns from the old thread.

New projects on a new buture version could have an checkable "extended

layer" mode in the stack setup. This feature will shift layers like

Klaus suggested in the old thread. If this checkbox is not set,

everything should work as before. When old projects are loaded/imported,

this checkbox will ofcourse be cleared.

For projects in "extended layer mode", all ULP's that work with extended

layer modes would need a "#using extended_layermode" at the top. If an

ULP without this key is run on a board in extended mode, an error like

"This ULP is unsuitable for extended layer mode." should pop up. An old

ULP would run as before on a non-extended layermode design.

If you wonder why I need 16+, its because I'm working on a rather dense

design with a 1500+ pin FPGA, more than 9 rather high current voltage

rails (0.95V, 1.00V, 1.2v, 1.5v, 1.8v, 2.5v, 3.3v, 5v and 12v) , 256 bit

(16x16) wide DDR4 memory at state of the art speed, 48 gigabit

tranceivers (diff lanes of 8 gigabit), and you simply dont experiment

with layer crossing with that kind of routing, especially not whe using

Eagle where the simulation is not built in. (Yes I do have some ULP's to

help me out here)

I will probably manage to crowbar this in to 16 layers on this project,

but the added comfort and time and blood saved in trial and error would

be much valuable. Switching to a new tool is even more painful/time

consuming. I would have to replace the man drawing it too.

On 3/05/2016 3:28 a.m., Richard Hammerl wrote:

Am 29.04.2016 um 08:41 schrieb Morten Leikvoll:

With the project I am working on, I'm starting to feel some pain about

the lack of more than 16 layers. I know I can most likely virtualize

some inner gnd-only layers (cloning the gerbers) but I'd like to ask

about the plans for this feature.

 

At the same time I know there are some challenges for the ones that work

with that many layers. First of all I'm thinking about polygon

processing speeds causing reluctance to do ratsnest until absolutely

necessary, but when doing power routing, it will need frequent fill

tests, but even doing ratsnest on a single net takes time. I wish this

function became more "live", so airwires would appeare instantly as you

place a via. My gut feeling as a programmer is that this is possbile to

speed up alot.

 

 

Currently we have no fixed plans for this. But we already put your

request into our bugzilla system as a possible feature for V8.

 

 

The discussion from Sept 2010 is well worth re-reading on this subject.

Particularly James's words on the decision making process to purchase.

http://www.eaglecentral.ca/index.php/mv/msg/38634/129058/736ed5d7e6ef3b087cee2f741a79e2e5/#msg_129058

Warren

Am 29.04.2016 um 08:41 schrieb Morten Leikvoll:

With the project I am working on, I'm starting to feel some pain about

the lack of more than 16 layers. I know I can most likely virtualize

some inner gnd-only layers (cloning the gerbers) but I'd like to ask

about the plans for this feature.

 

At the same time I know there are some challenges for the ones that work

with that many layers. First of all I'm thinking about polygon

processing speeds causing reluctance to do ratsnest until absolutely

necessary, but when doing power routing, it will need frequent fill

tests, but even doing ratsnest on a single net takes time. I wish this

function became more "live", so airwires would appeare instantly as you

place a via. My gut feeling as a programmer is that this is possbile to

speed up alot.

 

Currently we have no fixed plans for this. But we already put your

request into our bugzilla system as a possible feature for V8.

--

Mit freundlichen Gruessen / Best regards

Richard Hammerl

  CadSoft Support -- hotline@cadsoft.de

  FAQ: http://www.cadsoft.de/training/faq/