Actions
Forum Thread Details
  • Replies 6 replies
  • Subscribers 179 subscribers
  • Views 581 views
  • Users 0 members are here
Related

cant specify drill to pad clearance

autodeskguest

My layout allows smds overlapping the rest-ring on vias, but I don't

want any drill inside (or near) smds.

 

In DRC, I set smd-via for same signals to 0, but this also seems to

allow drills in the middle of a smd wich is normally bad (*). I think

this behaviour should change or improve. In the future, maybe a checkbox

to select if this clearance is measured from the drill perimeter or the

via/pad perimeter.

 

(*) To support this, the via's need to be copper filled and this may be

an expensive process that you normally don't want. Maybe a future Eagle

should allow this as a special option.

 

Parents

  • On 9/30/2016 7:46 AM, Morten Leikvoll wrote:

    My layout allows smds overlapping the rest-ring on vias, but I don't

    want any drill inside (or near) smds.

     

    In DRC, I set smd-via for same signals to 0, but this also seems to

    allow drills in the middle of a smd wich is normally bad (*). I think

    this behaviour should change or improve. In the future, maybe a checkbox

    to select if this clearance is measured from the drill perimeter or the

    via/pad perimeter.

     

    Hi Morten,

     

    I guess the issue here is that any check that is set to 0 becomes

    disabled, that's why it allows the drill running through it.

     

    One thing you could try is setting it to a really small value, that way

    the check is still active but the clearance value is insignificant.

     

    Try setting it to .01 mils or something like that. Is that better?

     

    Let me know if there's anything else I can do for you.

     

    Best Regards,

    Jorge Garcia

     

  • in reply to autodeskguest

    On 30.09.2016 18:17, Jorge Garcia wrote:

    On 9/30/2016 7:46 AM, Morten Leikvoll wrote:

    My layout allows smds overlapping the rest-ring on vias, but I don't

    want any drill inside (or near) smds.

     

    In DRC, I set smd-via for same signals to 0, but this also seems to

    allow drills in the middle of a smd wich is normally bad (*). I think

    this behaviour should change or improve. In the future, maybe a checkbox

    to select if this clearance is measured from the drill perimeter or the

    via/pad perimeter.

     

    Hi Morten,

     

    I guess the issue here is that any check that is set to 0 becomes

    disabled, that's why it allows the drill running through it.

     

    One thing you could try is setting it to a really small value, that way

    the check is still active but the clearance value is insignificant.

     

    Try setting it to .01 mils or something like that. Is that better?

     

    Let me know if there's anything else I can do for you.

     

    Best Regards,

    Jorge Garcia

     

    I assume if I set it to a very small value, the restrings will not be

    allowed to overlap the pad either? I want the drill away from smds, not

    the restring..

     

     

     

  • in reply to autodeskguest

     

    I assume if I set it to a very small value, the restrings will not be

    allowed to overlap the pad either? I want the drill away from smds, not

    the restring..

     

     

     

    Hi Morten,

     

    You would have to try it to be sure but I don't think it would be a

    problem. I think the rest-ring would be able to overlap the smd.

     

    Give it a shot and let me know.

     

    Best Regards,

    Jorge Garcia

     

  • in reply to autodeskguest

    On 03.10.2016 17:46, Jorge Garcia wrote:

     

    I assume if I set it to a very small value, the restrings will not be

    allowed to overlap the pad either? I want the drill away from smds, not

    the restring..

     

     

     

    Hi Morten,

     

    You would have to try it to be sure but I don't think it would be a

    problem. I think the rest-ring would be able to overlap the smd.

     

    Give it a shot and let me know.

     

    Best Regards,

    Jorge Garcia

     

    It IS a problem. See attached result of using 1mil same signal smd-via

    clearance. The smd can't even get close to the via.

    I hope you understand what I mean by drill-smd clearance vs via-smd.

     

     

     

    Attachments:
    image
  • in reply to autodeskguest

    On 4/10/2016 7:48 p.m., Morten Leikvoll wrote:

    On 03.10.2016 17:46, Jorge Garcia wrote:

     

    I assume if I set it to a very small value, the restrings will not be

    allowed to overlap the pad either? I want the drill away from smds, not

    the restring..

     

     

     

    Hi Morten,

     

    You would have to try it to be sure but I don't think it would be a

    problem. I think the rest-ring would be able to overlap the smd.

     

    Give it a shot and let me know.

     

    Best Regards,

    Jorge Garcia

     

    It IS a problem. See attached result of using 1mil same signal smd-via

    clearance. The smd can't even get close to the via.

    I hope you understand what I mean by drill-smd clearance vs via-smd.

     

     

    Greetings, I wish to comment.

     

    I agree it cannot be done. Even at the smallest clearance above zero it

    is the SMD and via that must keep away from each other otherwise the DRC

    throws an error

     

    This is another on a list of issues that Cadsoft should to address for

    Eagle to remain relevant.

     

    Eagle has not kept up with abilities demanded with the reduction of

    geometries of components and PCB. Created in the time of DIL14 ICs,

    Eagle was able force a number of guiding rules on the user but those

    restrictions now cause problems.

     

    So Morten's request needs to happen if you expect to be able to deal

    with the reducing size of components. The SMD and via should be able to

    overlap and the test should be that the hole keeps away from the SMD shape.

     

    The other similar missing feature inhibiting reducing geometries is the

    ability to specify a hole on the PCB without the copper being pulled

    back from the edge. That is, without making the

    DRC>Distance>Copper/Dimension =0 as you loose some desirable automatic

    features with polygons if you do.

     

    Regards

    Warren

     

  • in reply to autodeskguest

    The other similar missing feature inhibiting reducing geometries is the

    ability to specify a hole on the PCB without the copper being pulled

    back from the edge. That is, without making the

    DRC>Distance>Copper/Dimension =0 as you loose some desirable automatic

    features with polygons if you do.

     

    Regards

    Warren

     

    @Morten,

     

    I've put in an enhancement request for this.

     

    @warren

     

    Could you give a use case for this suggestion? This is the first I hear

    of this. Board houses do have limits to how close copper can be to a

    milling operation in the board, overriding it sounds dangerous to me.

     

    Let me know if there's anything else I can do for you.

     

    Best Regards,

    Jorge Garcia

     

Reply
  • in reply to autodeskguest

    The other similar missing feature inhibiting reducing geometries is the

    ability to specify a hole on the PCB without the copper being pulled

    back from the edge. That is, without making the

    DRC>Distance>Copper/Dimension =0 as you loose some desirable automatic

    features with polygons if you do.

     

    Regards

    Warren

     

    @Morten,

     

    I've put in an enhancement request for this.

     

    @warren

     

    Could you give a use case for this suggestion? This is the first I hear

    of this. Board houses do have limits to how close copper can be to a

    milling operation in the board, overriding it sounds dangerous to me.

     

    Let me know if there's anything else I can do for you.

     

    Best Regards,

    Jorge Garcia

     

Children
No Data