Eagle - handling Vcc and Gnd

Hi Mark,

The question: There is probably a simple answer to this, but I couldn't seem to get there. Most of the ICs in the Library don't have Vcc and Gnd pins on the layout. Once the IC is in the schematic, how do I add a bypass cap to Vcc, or in general, hook up the +5V and Gnd to the chip?

John Wolf

johnwolf.lobo@gmail.com

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robotonics over 13 years ago

Hi

I tend to use SUPPLY library parts and / or Net Labels in this situation. This is an extract from a circuit I am working on at the moment.

The GND is from SUPPLY1 library, 3.3V is a NET LABEL in this circuit.

Hope this helps...
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LargoLobo over 13 years ago in reply to robotonics

Hi Mark,

I understand the supply library to get power and ground to the schematic. I was referring to a chip like the 74LS194 that doesn't have pins 16 and 8 on the library image so there is no way to connect the power and ground to the chip in the schematic. If they were in the diagram for the chip, I wouldn't have an issue. I was thinking there must be a layer trick or some Eagle method I'm not aware of to add the +5 and gnd to the IC since it's not on diagram from the library. That's the question.
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robotonics over 13 years ago in reply to LargoLobo

Hi

As long as you label your power nets correctly it will work, in your case VCC and GND, when you add a bypass cap for instance, you would label one end VCC and the other GND, the VCC and GND on the chip will already be part of the net.

Does that make sense?
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LargoLobo over 13 years ago in reply to robotonics

Yep. That makes sense. I just have to make sure I keep all the Vcc and Gnd stuff on their net.

Thanks.
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Richard_H over 13 years ago in reply to LargoLobo

Hi John,

some of the library components have hidden power pins. With the INVOKE command you are able to place the power gates separately in the schematic.

Regards,
Richard
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Richard_H over 13 years ago in reply to LargoLobo

Hi John,

some of the library components have hidden power pins. With the INVOKE command you are able to place the power gates separately in the schematic.

Regards,
Richard
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