Amega328p-au shorted pins ?

Hi James,

James Zelazny jr wrote:

 

Finally motivated myself into trying Eagle files only to see my original instincts told me NOT to bother.

I get it you are feeling frustrated, the first time I tried to use EAGLE it didn't go so well. I had to sit down and read the manual and tutorials to understand how it works as previously I had spent a lot of time with DxDesigner/PADS and OrCAD, and EAGLE was quite a change from both of these.

James Zelazny jr wrote:

 

The last thing I expected was not finding common components in the library.My first mistake to assume that an Atmega328p-au would be one of the easiest to find.Not so and had to search the ends of the earth to find it and manually place it into the LIBR directory.After a 4 hour search and finally having this IC in my schematic layout

So the issue here is assuming the bundled parts library is useful. As with the "free" parts libraries that are bundled with absolutely all ECAD packages, not just EAGLE, you get what you pay for. If you value your time and the integrity of your designs you'll just create your own libraries. It's actually quite easy once you've done a few parts. There are great tutorials to get you started on Adafruit and Dangerous Prototypes. To start this from scratch and do it properly yourself would have been a fraction of the time you spent searching.

James Zelazny jr wrote:

 

.After a 4 hour search and finally having this IC in my schematic layout I now see "shorts" on several pins of this chip in the BRD window.The worse possible places no less on 3.3v and ground !!

I can probably modify this file but now getting far deeper into a simple project I thought would be straight forward.

Is it a software glitch causing this or a bad library file ?

Anyone know where to find a working Atmega328p-au footprint

See attached screen shot of the issue.

It looks like it's just showing air wires between pins on the same net, not between nets i.e. it's connecting all the GND and separately all the 3.3V but I am a little perplexed why as it doesn't look like you have any nets added on the schematic and dropping in a part with multiple pads on the same pin of the part doesn't show air wires for me until I connect up a net in the schematic. Could you put the lib/sch/brd files up on here so we can take a look at what you have done please?

Best Regards,

Rachael

The screenshot is just me adding the very first component into the work space.I did nothing but add the library file for the Atmega328p-au,started the program and was the very first component selected.I did nothing but check the board view to find these pins already wired.

I spent an entire day downloading as many components for my project as possible and had it just about completed on the second day when I discovered many wires in places that should not have been.So,cleaned the slate and even re-installed Eagle and started over.

This time I wanted to place a component and do little at a time while checking for bogus traces.That is when I finally discovered these connections right off before even starting the project...just merely adding the component and this shows up.

I also would like to note that sometimes the program crashes and will lose my work unless I save each and everything I do.

Frustrated is a mild term at this point.

So basically,I open the program,create a project and the first thing I do is select the Atmega328p-au and put it into the schematic work space.and that is what I am getting.I have done nothing else

Here is the file I used and wonder if it is just a bad file itself ?

https://www.snapeda.com/parts/ATMEGA328P-AU/Atmel/view-part/

Give it a try and see what you get ?

Thought to share the work done already on my schematic but pretty sure there are errors somewhere along the line.

The biggest hurdle so far is getting a crystal connected to an IC.

Not really sure why it does not show up properly in board view but here is my goal.

See drawing -

When I try this the caps end up on the IC pins and the crystal on the opposite side.I do not think the circuit will function properly this way.

I am making connections exactly as the diagram shows.Missing a step somewhere ?

Here is my schematic and board view.

Seems the crystal pins should be connected to the IC and the caps after that to ground the way it was drawn ?

Maybe it is correct and I am not used to organizing things properly on board view?

Hi James,

I think it's probably ok. If you place the crystal where you want it, near the IC pins and then the caps the other side where you want them, if you then press the ratsnest button or type RAT <return> you should see it re-optimise the air wires to the order you expect.

The other thing to note is in the image of the schematic above it is warning about forward and back annotation being severed. You need to make sure you always have both the schematic and board open and never make any changes that will affect the netlist when one or the other is closed otherwise you will end up in a mess.

Best Regards,

Rachael

Thank you for the note.

Still need to learn about the options the program has yet plus need to orient my head to seeing a circuit rather than a diagram.

This has been a big transition to me since my projects were mostly been accomplished using diagrams rather than schematics.

I`ll get used to this yet.

Appreciate the help once again.I need to adjust my eyes and look this over a bit closer.

Auto routing helped a lot so far rather than a spaghetti of lines

Also,being very careful when checking from schem to board not to change anything to goof it all up.

After several days and many hours I am giving up on Eagle.

My project is too simple and struggling with this software is making it much harder than it should be.

This has been tried on 3 machines to eliminate OS as the cause.Searched high and low for footprints and symbols for my specific components.

Read every forum post and video and nothing works like is said or seen.

In the end,I took 3 simple components which were a pair of identical 5 pin headers and a 10 pin IC (Si5351a) and simply connected the pins to just that all by itself.

I get nothing but errors all day long.

Just downloaded the complete Adafruit Si5351a ,BRD/SCHEM and ran it into Eagle using all and every method learned from videos and forums and still it shows the same errors.

I changed drills,mils and mm`s and other settings and sizes with no results...not even slight changes.

Since my project is not protecting the universe,going to mount these tiny components onto thin light material using glue and soldering point to point.

The time spent on software and computers was time spent soldering

Thanks for the help but time to move forward.

I think someone needs to try the Si5351a synthesizer chip first and could be Eagle free version is incapable of using it?

Hi James,

Can you post up a sample of the errors you are seeing here please so we can see what's happening?

Also, can you attach the .lbr file you found containing the Si5351a and I will take a look at it.

Best Regards,

Rachael

I think this is what I have been using - https://www.snapeda.com/parts/SI5351A-B-GT/Silicon%20Labs/view-part/

Also,tried using this schematic and get the very same clearance issues with the Si5351a.

https://github.com/adafruit/Adafruit-Si5351A-Clock-Generator-Breakout-PCB

I even tried to route my own but can not seem to make the traces small enough.They end up touching.But even using the plain Si5351a chip on a pair of 5 pin headers the clearance error continues.

I just can not seem to fix this error.

Had the entire schematic made and remade several times and getting tired.Tried the board portion equally as much and everything in between.

Following the video steps exactly and getting different results.

I should describe this circuit.My goal is to shrink down a circuit I already successfully use for high altitude balloons.

It consists of 3 stages,GPS SI5351 Atmega328p-au

My current working setup is crude and was hoping to go 100% surface mount to drastically reduce weight.My total weight now is about 28 grams and feel surface mount will greatly reduce it even more.The reason for this weight loss is also reducing balloon size and helium reduction therefore increasing altitudes.I only get around 30k feet and need to get at least 35 - 40k to avoid storms.

That is the plan anyhow.

Here you see my old build which may give you an idea what the goal is.

So if I hand solder onto construction paper or plain phenolic board,it will all work the same way.

Having one neat PCB was just a luxury and seems out of my reach

Jim

I`ll just upload my entire schematic.

This is not the same as it was since I decided to eliminate traces and thought it would be easier to section out the circuit into 3 sections.

Rather than a bunch of traces,tried using headers where later I can hand solder jumpers to avoid all these design issues.Everything will still be on one PCB but some hand tracing involved.

It seemed to reduce the headaches except that dreaded Si5351a clearance stuff.

Anyhow,here it is.

I`ll just upload my entire schematic.

This is not the same as it was since I decided to eliminate traces and thought it would be easier to section out the circuit into 3 sections.

Rather than a bunch of traces,tried using headers where later I can hand solder jumpers to avoid all these design issues.Everything will still be on one PCB but some hand tracing involved.

It seemed to reduce the headaches except that dreaded Si5351a clearance stuff.

Anyhow,here it is.

Found another possibility for footprint - CAD/CAE Schematic Footprints and Symbols | Silicon Labs

But another program to figure out to go with it .

Another Si5351a library - Starting to Build my Personal EagleCAD Library — Tristan Robitaille

Hi James,

Sorry, I haven't been ignoring your posts, I've been out this evening. I'll take a look at what you've posted up in the morning :-)

Best Regards,

Rachael

Just sharing to the group for the records on this topic.

No hurry for me and do not expect anyone to solve my issues.I needed to walk away from it awhile and clear my head.

Still waiting for the final components to arrive anyhow so will be some time before planning a build.

I am sure someone with experience in Eagle will know what I am doing wrong...most likely the fact I need to just keep working on it and learn more.

Jim

Decided to try one more time tonight.

This time I used the full size board work area without trying to squeeze everything in for a quick run.

Also read this issue related - http://www.bot-thoughts.com/2013/09/eagle-sudden-clearance-errors-isolation.html

Tried the solution in the post and also ran through my entire design rules settings.

Whatever it was I get NO DRC errors now.

Since I changed 3 major settings,not sure which it was causing my headaches.

Tomorrow going to try rewriting the schematic the way I originally planned and shrink it down to a reasonable size.

See what happens.

Jim

With the schematic re-drawn like I want,went ahead and tried to make another board.

Autorouting shows some connections bad.A run of the DRC once again shows the same issue regarding clearance on the Si5153a IC.

I am am bit confused about auto routing since there are few options.This time,I set it up with EFFORT set to high rather than default.

I still have a vague knowledge in where this should be anyhow.Still searching out more info.

Final schematic.

Hi James,

I've just had a quick look at your latest schematic and made a quick board with it.

The first thing to note is that your silk screen elements in the board your a mixture of vector (correct) and proportional (incorrect) and this will lead to your silk screen on your PCB not looking like you expect when you get your boards back. To have clear and consistent silk screen legends which match the board you must you vector for all your parts. Now, this isn't your fault exactly, its down to relying on poor quality parts sourced from either the bundled "free" libraries or from the internet.

Now, onto your DRC problem. When I ran your schematic through to a board and ran DRC, if I don't load a .dru file from the board manufacturer and rely on the defaults, then I get a bunch of clearance errors. I then went and loaded the basic 2-layer .dru file from Eurocircuits and ran DRC and it passed without error. What fab house are you using for your boards? Do they provide an EAGLE .dru file (or files) for their capabilities? If so then load this and run DRC. Then if there are still any errors, examine them on a case by case basis to determine if you really need to worry.

With regards the auto router, well you can use it if you must but you wont get the best result. I think it's best used as a tool to help manual routing. Manual is the way to go really and then you can use the auto-router selectively to help you route simple but very repetitive groups of traces. First thing to do though it to get the placement right as that is 90% of the battle. Move things around, rotate etc, even update the schematic if needed to get the air wires to run a cleanly as possible. Remember to run ratsnest regularly so you can see how things are improving. Once you are happy with placement you can then start to route things in. I get critical nets like clocks routed in first, then work your way through the rest, leaving the least critical to last. Make sure your power and grounds are done well and do make sure you have adequate decoupling caps. I don't see any bulk or bypass caps in your design. I know you are trying to save weight but you might need a few. internal power/ground planed in the board will help there too, although again they will add a little weight.

Best Regards,

Rachael

I will start by finding the EAGLE .dru files which I need to check with Oshpark or whoever has the best help in this project.

Going to look all this over thoroughly and see about making up new footprints as well.

Seems too bad that the footprints I have in my library do not work properly.

Most likely some challenges ahead until I learn this stuff.

I appreciate you looking this over and for your time.Hopefully this post will help others not to mention a great reference point for myself during this task.

Jim

Guessing I need this 2 layer .dru file if I am using Oshpark for my PCB`s ?

OSH Park Docs ~ Eagle Design Rules files.