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Forum Amega328p-au shorted pins ?
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Related

Amega328p-au shorted pins ?

n2nxz
n2nxz over 9 years ago

Finally motivated myself into trying Eagle files only to see my original instincts told me NOT to bother.

The last thing I expected was not finding common components in the library.My first mistake to assume that an Atmega328p-au would be one of the easiest to find.Not so and had to search the ends of the earth to find it and manually place it into the LIBR directory.After a 4 hour search and finally having this IC in my schematic layout I now see"shorts on several pins of this chip in the BRD window.The worse possible places no less on 3.3v and ground

I can probably modify this file but now getting far deeper into a simple project I thought would be straight forward.

Is it a software glitch causing this or a bad library file ?

Anyone know where to find a working Atmega328p-au footprint

See attached screen shot of the issue.

image

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  • n2nxz
    0 n2nxz over 9 years ago in reply to n2nxz

    Guessing I need this 2 layer .dru file if I am using Oshpark for my PCB`s ?

    OSH Park Docs ~ Eagle Design Rules files.

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  • n2nxz
    0 n2nxz over 9 years ago in reply to rachaelp

    I will start by finding the EAGLE .dru files which I need to check with Oshpark or whoever has the best help in this project.

    Going to look all this over thoroughly and see about making up new footprints as well.

    Seems too bad that the footprints I have in my library do not work properly.

    Most likely some challenges ahead until I learn this stuff.

    I appreciate you looking this over and for your time.Hopefully this post will help others not to mention a great reference point for myself during this task.

    Jim

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  • rachaelp
    0 rachaelp over 9 years ago in reply to n2nxz

    Hi James,

     

    I've just had a quick look at your latest schematic and made a quick board with it.

     

    The first thing to note is that your silk screen elements in the board your a mixture of vector (correct) and proportional (incorrect) and this will lead to your silk screen on your PCB not looking like you expect when you get your boards back. To have clear and consistent silk screen legends which match the board you must you vector for all your parts. Now, this isn't your fault exactly, its down to relying on poor quality parts sourced from either the bundled "free" libraries or from the internet.

     

    Now, onto your DRC problem. When I ran your schematic through to a board and ran DRC, if I don't load a .dru file from the board manufacturer and rely on the defaults, then I get a bunch of clearance errors. I then went and loaded the basic 2-layer .dru file from Eurocircuits and ran DRC and it passed without error. What fab house are you using for your boards? Do they provide an EAGLE .dru file (or files) for their capabilities? If so then load this and run DRC. Then if there are still any errors, examine them on a case by case basis to determine if you really need to worry.

     

    With regards the auto router, well you can use it if you must but you wont get the best result. I think it's best used as a tool to help manual routing. Manual is the way to go really and then you can use the auto-router selectively to help you route simple but very repetitive groups of traces. First thing to do though it to get the placement right as that is 90% of the battle. Move things around, rotate etc, even update the schematic if needed to get the air wires to run a cleanly as possible. Remember to run ratsnest regularly so you can see how things are improving. Once you are happy with placement you can then start to route things in. I get critical nets like clocks routed in first, then work your way through the rest, leaving the least critical to last. Make sure your power and grounds are done well and do make sure you have adequate decoupling caps. I don't see any bulk or bypass caps in your design. I know you are trying to save weight but you might need a few. internal power/ground planed in the board will help there too, although again they will add a little weight.

     

    Best Regards,


    Rachael

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  • n2nxz
    0 n2nxz over 9 years ago in reply to n2nxz

    Final schematic.

    Attachments:
    1346.TRACKER.zip
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  • n2nxz
    0 n2nxz over 9 years ago in reply to n2nxz

    With the schematic re-drawn like I want,went ahead and tried to make another board.

    Autorouting shows some connections bad.A run of the DRC once again shows the same issue regarding clearance on the Si5153a IC.

    I am am bit confused about auto routing since there are few options.This time,I set it up with EFFORT set to high rather than default.

    I still have a vague knowledge in where this should be anyhow.Still searching out more info.

    image

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  • n2nxz
    0 n2nxz over 9 years ago in reply to n2nxz

    Decided to try one more time tonight.

    This time I used the full size board work area without trying to squeeze everything in for a quick run.

    Also read this issue related - http://www.bot-thoughts.com/2013/09/eagle-sudden-clearance-errors-isolation.html

    Tried the solution in the post and also ran through my entire design rules settings.

    Whatever it was I get NO DRC errors now.

    Since I changed 3 major settings,not sure which it was causing my headaches.

    Tomorrow going to try rewriting the schematic the way I originally planned and shrink it down to a reasonable size.

    See what happens.

    Jim

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  • n2nxz
    0 n2nxz over 9 years ago in reply to rachaelp

    Just sharing to the group for the records on this topic.

    No hurry for me and do not expect anyone to solve my issues.I needed to walk away from it awhile and clear my head.

    Still waiting for the final components to arrive anyhow so will be some time before planning a build.

    I am sure someone with experience in Eagle will know what I am doing wrong...most likely the fact I need to just keep working on it and learn more.

    Jim

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  • rachaelp
    0 rachaelp over 9 years ago in reply to n2nxz

    Hi James,

     

    Sorry, I haven't been ignoring your posts, I've been out this evening. I'll take a look at what you've posted up in the morning :-)

     

    Best Regards,

     

    Rachael

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  • n2nxz
    0 n2nxz over 9 years ago in reply to n2nxz

    Another Si5351a library - Starting to Build my Personal EagleCAD Library — Tristan Robitaille

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  • n2nxz
    0 n2nxz over 9 years ago in reply to n2nxz

    Found another possibility for footprint - CAD/CAE Schematic Footprints and Symbols | Silicon Labs

    But another program to figure out to go with it .

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