hi, thanks to you guys for the suggestion. I did some pin swap in schematic and rerouted the PCB manually. It took me 2 days...Default DRC passed. Below is the result.
Net classes: signal traces 10mil, via 20mil, clearance 10mil; Power traces 24mil, via 20 mil, clearance 10 mil. I did some research on this and I think this is enough for my design. But still, I'd appreciate it if you could give more advice. Traces in the central part are so crowded. Some traces on bottom and top overlap, idk if it will be a problem.
I add some vias to connect top and bottom ground plane. But those are smaller (14mil drill) than in my net classes. So the DRC warned me. Can I ignore this?
 
			     
             
					


 
							 
							
