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polygon region short circuit

acw210ee

So i have polygons overlapping each other connected to nets, it seemed to draw them fine with J1 in the pcb however i get the DRC i get a short errors:

Clearance Constraint (Gap=6mil) (All),(All)
Polygon Region (93 hole(s)) Bottom Layer Pad J1-1(2129.921mil,-459.134mil) Multi-Layer
Polygon Region (88 hole(s)) Signal Layer 2 Pad J1-1(2129.921mil,-459.134mil) Multi-Layer
Polygon Region (93 hole(s)) Bottom Layer Pad J1-3(1870.079mil,-459.134mil) Multi-Layer
Polygon Region (88 hole(s)) Signal Layer 2 Pad J1-3(1870.079mil,-459.134mil) Multi-Layer
Polygon Region (48 hole(s)) Top Layer Pad J1-3(1870.079mil,-459.134mil) Multi-Layer

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Short-Circuit Constraint (Allowed=No) (All),(All)
Polygon Region (93 hole(s)) Bottom Layer Pad J1-3(1870.079mil,-459.134mil) Multi-Layer
Polygon Region (88 hole(s)) Signal Layer 2 Pad J1-3(1870.079mil,-459.134mil) Multi-Layer
Polygon Region (48 hole(s)) Top Layer Pad J1-3(1870.079mil,-459.134mil) Multi-Layer

When i remove J1 the problem goes away, however i am not sure what is causing it. As the issue with the polygon pours does not occur with the ot

her components. Should i just ignore the issue?

image

Parents

  • Hi,

    The answer is no. A DRC error should never be ignored unless the reason for it is known and either corrected or acknowledged. In your case, since the reason is not known, it is not reasonable to ignore it.

    I don't use Circuit Studio (KiCad is better supported even through community support), so I'm not 100% sure of the reason.

    image

    What are all the small red circles? Are they the way Circuit Studio indicates an error, or are they very small top layer circular pads? If they are pads, they are exceedingly small. 

    Circuit Studio may use the concept of polygon 'priority' or 'rank' (other CAD packages do). It may be worth altering such a priority in case that is somehow causing a short.

    One more thing worth doing sometimes is to proceed with generating Gerber files, and then inspecting them in a Gerber viewer. Sometimes the problem area can be more easily identified from there.

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  • Hi,

    The answer is no. A DRC error should never be ignored unless the reason for it is known and either corrected or acknowledged. In your case, since the reason is not known, it is not reasonable to ignore it.

    I don't use Circuit Studio (KiCad is better supported even through community support), so I'm not 100% sure of the reason.

    image

    What are all the small red circles? Are they the way Circuit Studio indicates an error, or are they very small top layer circular pads? If they are pads, they are exceedingly small. 

    Circuit Studio may use the concept of polygon 'priority' or 'rank' (other CAD packages do). It may be worth altering such a priority in case that is somehow causing a short.

    One more thing worth doing sometimes is to proceed with generating Gerber files, and then inspecting them in a Gerber viewer. Sometimes the problem area can be more easily identified from there.

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