Role for FPGA or CPLD with Raspberry Pi

There's a nice new write-up of Valent F(X) FPGA boards for RasPi and BeagleBone at Linux Gizmos: BeagleBone and Raspberry Pi gain FPGA add-ons.  Boards not yet available commercially, but they're considering a Kickstarter.

Very interesting.  I had a good chuckle at "LOGI-BONE SLIM" and "LOGI-BONE PHAT". :-)

Care to hazard a guess at pricing?

Bugblat cost is also hidden by a $22 charge for shipping, so the real cost is close to $60 while you can get the breakout board with the largest XO2 chip for $26 directly from Lattice.

I have been using the Lattice family since the GAL families in the 80's.

I like the fact that they are instant on, and do not need to relaod the firmware at each power on like Xilinx and Altera. But they are limited in size, about 6500 LUTs.

Teir larger FPGA family is the ECP3, but they all are large ball count BGA, so not for the average DIY dude.

> The two devices aren't even remotely the same in capability nor price.

Totally agree. However, the Guzunty is my baby and I am very sensitive to devices that might be perceived by some to be better. :-)

John Beetem wrote:

 

Speaking of "cuddly CPLDs", I guess Morgaine never saw (or has forgotten) the old MMI PAL data books, which were filled with cartoon drawings of friendly, smiling "PALs" in standing-up DIP packages.

I have in front of me Monolithic Memories' Programmable Logic Handbook of 1985 featuring a cuddly and smiling PAL sitting on a die on page 1-5, and on page 1-6 waving a rod at a very non-smiling PROM teaching it new tricks.

Some things just can't be thrown away.

Jean-Paul Louis wrote:

 

I have been using the Lattice family since the GAL families in the 80's.

I have Lattice's GAL Data Book from 1989 on the shelf here too, but it has no cuddly smiling chips.

Morgaine Dinova wrote:

 

Jean-Paul Louis wrote:

 

I have been using the Lattice family since the GAL families in the 80's.

I have Lattice's GAL Data Book from 1989 on the shelf here too, but it has no cuddly smiling chips.

The only advantage to companies' not giving away or selling data books any more is that you never have to throw away old data books to make room for new ones.

Pack rat?  Moi?

Edit: Woo hoo!  This is my post number 1000 (decimal)!

Well I did throw away most of my PDP and VAX handbooks.  I hope Drew isn't listening.

Addendum:

John Beetem wrote:

 

Edit: Woo hoo!  This is my post number 1000 (decimal)!

Congratulations!

Packrat? moi? naw. I just can't part with my 1975 RCA COSMOS Digital catalog.

Who remembers Silicon on Saphire?

an open source tool chain for FPGA design is frankly a ridiculous idea, all FPGA vendors release and support their own proprietry design software and trying to integrate all the features that they support into a single tool is, well the first question I would ask is why the hell would you even want to think about attempting it?

The whole idea is typical of the open source software community as a whole, nerds with nothing better to do than bleat about linux.

@FF

The economics may be different but in principle the idea of FOSS support for FPGA design is not that different from the GCC concept. At the higher levels of abstraction the tools are (in both cases) hardware agnostic. Actual fitting and routing into an FPGA is very hardware specific (although I'm not sure that FPGA architectures are any more diverse than processors'). The usual way this is dealt with is by a vendor supported software component but completely independent designs are possible.

The question as to why is perhaps less obvious - quite good FPGA tools are available free or very cheap but when you need serious tools it starts to cost a bit more.

The VHDL/Verilog simulator that I use on a day to day basis costs more than £10k - you can get the same thing for free in a crippled  version (artificially slowed down). If there were an open source version it would run at full speed for everyone so that would fit nicely with the silicon vendors free router/fitter.

The open source community has every right to crow/bleat/be-proud-of Linux - it is hugely successful and has done a lot to stimulate the efforts of others to make better stuff at better prices.

MK

If you have so little to do in your day job that you think rewritting huge amounts of code to no good effect is a good use of your time then maybe you should come and work for me and we'll get you doing real world designs which we have to sell to real customers using the code supplied by the likes of Xilinx and Altera.In my company we spend our time making money by selling designs which people use, rather than dicking about with open source crap.

If you have so little to do in your day job that you think rewritting huge amounts of code to no good effect is a good use of your time then maybe you should come and work for me and we'll get you doing real world designs which we have to sell to real customers using the code supplied by the likes of Xilinx and Altera.In my company we spend our time making money by selling designs which people use, rather than dicking about with open source crap.

I'll ignore the somewhat offensive tone and address the substance of your comment.

At no time did I suggest that I would be investing my time in writing FOSS code for FPGA development. The most likely source for such funding would be one of the smaller silicon vendors and the reason that they might do it is that rather than pay Mentor\Aldec etc for the subsidised use of their tools they could fund FOSS and leverage the open source effort that this might attract.

Your perspective of FPGA design is obviously limited by your Altera/Xilinx focus, I already sell designs which people use and I don't use Altera or Xilinx parts. As I explained before I use a paid-for simulation tool.

I'll leave it to others to correct your rather weird generalised open source antipathy - I don't happen to use Linux but I do use some open source tools - and I find the range of quality to be not much different than paid-for but the cost is lower.

MK