Need help setting up wave properties within my Rpi Python Code when using an ADS9850 Module.

The ADS9850 has only one output - it can only make one sine wave at a time - IOUTB is just the complement of IOUT.

The ADS9850 has no provision for amplitude control or DC offsetting the output.

A phase relationship between two different frequencies doesn't mean anything unless one is an exact multiple of the other.

Sorry.

If you explain what you are trying to do (block diagram or description of complete system) it might be possible to help.

MK

Michael,

Thank you for your feedback. 

I am planning on using two separate analog sine wave signals to feed into piezoelectric ultrasonic transducers in order to create standing waves of various configurations in a fixed length tube (Open-Closed, Open-Open,Closed-Open). The transducers would have to be fed either the 28125Hz and the 37500Hz frequency depending on mission conops (programmable by the Pi).

1) Based on your reply, I guess the alternative would be to use two separate DDS modules wired up to the same RPI to produce my two different frequency sine waves.  I am wondering if I can have a shared W_CLK, FQ_UD, and RST GPIO connections for both DDS modules and only the D7 connection be separate to program my two different frequencies into each DDS?

2) I have a hardware workaround involving a voltage divider for the creation of a 0.5DC offset. However, a friend told me that the DDS outputs a wave with a 0.5 DC offset by default and that would be ideal. The reason why I need an offset is because I am feeding the analog sine wave through an Op-Amp (LT1632) to provide a Voltage gain of 9 (trying to achieve a 9Vpp post amplification). This Op amp does not let negative voltages go through so I need my signal to be 0.5V centered. Post-amplification I will put a DC blocking capacitor to put my wave back to be 0V centered again because that is what the transducer requires. The rail-to-rail op-amp is powered by an external 9V Energizer alkaline.

3) Since the SinB output is a complement of the SinA output, does that mean if I put the first wave (28125HZ frequency) to my SinA output of DDS1, and my second wave (37500) to my SinB output of DDS2, they will be 180 degrees out of phase? Because that is actually what I want but I am not sure if that will work.

To summarize in a flow diagram:

RPI ----> DDS1 (28125 Hz sine wave SinA pin) ,DDS2 (37500Hz sine wave SinB pin) ---> LT1632 Op amp (one chip has two op amps) ----> DC blocking capacitors -----> Ultrasonic transducers

Trying to see if there is anything else I can put into code to minimize my hardware parts.

Thanks for your help,

Tony

Hello,

You can use 2 ADS9850s, you need to connect both FQ_UD pins to the same RPi GPIO pin - this will enable you to start both 9850s perfectly in sync.

Both 9850s must use the exact same clock, so you need to disconnect the clock from one board and drive it with the clock from the other.

You can share WCLK pins but you may not wish to, because you will need a lot of RPi pins to have to 8 bit data connections (one to each 9850), better to share D0 - D7 and have a W_CLK for each 9850.

Use Rset = 3k9, put 82R from IOUT to ground - this will give you 0.82V peak - peak output.

You can waggle the relative phase of the signals from the two boards by adjusting the phase bits in the control words.

The schematic below (composed and simulated in LTSpice free download from ADI, do please download and use it.) shows how to connect the LT1632.

The 1632 wouldn't have been my first choice (too fussy and wide bandwidth, may oscillate, not very breadboard friendly).

You probably don't need an output cap - most piezo transmitters don't care about a few volts of DC bias. If you like put 1uF cap between VOUT and the transmitter. Connect the other side of the transmitter to ground.

The gain of the amplifier is R3/R4, C3 sets the LF cut of point and C4 the HF cut off point. R5 is essential to stop the LT1632 from oscillating (page 13 of the data sheet).

I hope you have access to an oscilloscope - you will not get this lot working without !

May I ask why you don't do this experiment the obvious way - I would hook it up in my lab in 5 minutes using a dual channel waveform generator - the university must have such things available.

MK

Michael,

Thank you for this extensive response.

I am driving the modules serially, so only one GPIO pin is required for each DDS D7 pin?

When you say "disconnect the clock from one board and drive it by the clock from the other", do you mean to have a shared clock wire coming from the Rpi GPIO into a common rail that splits to each W_CLK on DDS1 and DDS2?

0.88V Peak to Peak is what I was getting originally when I tested the DDS (although it was only one), so there wouldn't be a way to get this amplitude up to 1Vpp?

I chose the 1632 mostly due to its high slew rate and GBW, couldn't find any other op-amp that would provide the maximum gain possible for my frequencies used (I want around 9Vpp post amplification). Thank you for providing the circuit diagram! Will make sure to use it.

We do have tons of equipment at the labs. The purpose of this circuit is actually to drive the transducers as a waveform generator. This experiment is going to be launched as part of a student payload experiment program on a New Shepherd rocket in a small payload box in June. The transducer team is doing their experiments with a waveform generator to actually see if they can make a standing wave in a short tube. Meanwhile, I am stuck here with some circuit components since we cant send a bulky waveform generator to space and it cant be super expensive

Thanks much again!

Michael,

Thank you for this extensive response.

I am driving the modules serially, so only one GPIO pin is required for each DDS D7 pin?

When you say "disconnect the clock from one board and drive it by the clock from the other", do you mean to have a shared clock wire coming from the Rpi GPIO into a common rail that splits to each W_CLK on DDS1 and DDS2?

0.88V Peak to Peak is what I was getting originally when I tested the DDS (although it was only one), so there wouldn't be a way to get this amplitude up to 1Vpp?

I chose the 1632 mostly due to its high slew rate and GBW, couldn't find any other op-amp that would provide the maximum gain possible for my frequencies used (I want around 9Vpp post amplification). Thank you for providing the circuit diagram! Will make sure to use it.

We do have tons of equipment at the labs. The purpose of this circuit is actually to drive the transducers as a waveform generator. This experiment is going to be launched as part of a student payload experiment program on a New Shepherd rocket in a small payload box in June. The transducer team is doing their experiments with a waveform generator to actually see if they can make a standing wave in a short tube. Meanwhile, I am stuck here with some circuit components since we cant send a bulky waveform generator to space and it cant be super expensive

Thanks much again!

Hello Antony,

For a space application the approach you have is very, very wrong. You can do all this with a suitable micro using far fewer parts (which will make it reliable) and much less power.

For now you may want to press on with the RPi + 9850s.

Look at page 5 on the data sheet for the 9850 - there are two clocks, W_CLK is for "clocking" data in and out and comes from the RPi. CLKIN (on pin 9) is the clock used to make signals and it must be shared, so the two 9850s run at exactly the same frequency. You will need to remove or disconnect the crystal oscillator on one module and link the signal from the other so one oscillator drives both pin 9s. Use the shortest link possible. (If you don't do this one AD9850 clock could easily be 50ppm different from the other, and it would take less than 1 second to get a drift of 360 degrees between the sine signals.)

There is another issue which should not be be a problem, your FQ_UD signal is generated by the Pi and is asynchronous with the CLKIN signal from the module crystal oscillator. So when it changes state to start off the two ADS9850s it may do so just on the edge of the CLKIN signal, and one ADS9850 may catch the edge one whole CLKIN cycle before the other - this will mean that every time you try to restart the ADS9850s there will be a random 8ns jitter between the two output signals (about 0.1 degree). If you were working at higher frequencies it would be a problem.

Eventually you might want to think about changing the oscillator to a more reasonable frequency - like maybe 10 or 20 MHz - which will be less susceptible to problems interconnecting the two AD9850s.

Re. choice of amplifier, you want a closed loop gain of 10, so should aim for an open loop gain of 100 (50 would do) at 37500Hz, so you need a GainBandwidth product of about 4MHz. A Microchip MCP6H92 should do you.

MK

Got it,

I understand this might not be the most efficient and best way to do this for such an application, but we were constrained by time and budget so going to roll with this for now.

I will wire everything up and report back on my results! Thanks much again for the help!

Tony

Good luck !

MK

Michael,

Could you please provide a link to where you found that LTSpice Simulation for the LT1632 Op amp?

Thanks!

Well, I sort of did:

"composed and simulated in LTSpice free download from ADI"

ADI is Analog Devices Inc, https://www.analog.com/en/index.html  there is a big download LTspice thing about in the middle of the page.

The model is attached - you need to open it in LTspice - won't make any sense as text.

LTspice has online help that's OK and there is alot of stuff on the web.

MK