Hi - firstly, if I stuff this and blow up my boards, that is my responsibility, no matter what you tell me.
Now the only clash on GPIO pins is on GPIO pins 2 and 3, used by the hifiberry dig+ for I2S comms, and by the PI desktop for SDC etc.
1. Any experience of hat stacking these products?
2. General comments you can make about problems
3. Does the Pi desktop card do the HAT EEPROM check?