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LOGI-PI-2 - Would this dev board allow an external clock source to be connected ?

jarez95 over 10 years ago

Can an external clock source be connected to the FPGA, allowing it to run on this clock rather than the local one?

Preferably 100 MHz

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clem57 over 10 years ago

michaelkellett
is right. I have this article by TI showing the problems of synchronization with SPI over distance (http://www.ti.com/lit/an/slyt441/slyt441.pdf ). The tighter the tolerances, the worse it gets. Even though SPI was meant as a chip to chip protocol, factories try it over distance. And in the lab were things are clean, noise from the environment will distort your clock. So proper shielding becomes necessary. I give SPI only as the example of things to consider in your application.
Clem
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clem57 over 10 years ago

michaelkellett
is right. I have this article by TI showing the problems of synchronization with SPI over distance (http://www.ti.com/lit/an/slyt441/slyt441.pdf ). The tighter the tolerances, the worse it gets. Even though SPI was meant as a chip to chip protocol, factories try it over distance. And in the lab were things are clean, noise from the environment will distort your clock. So proper shielding becomes necessary. I give SPI only as the example of things to consider in your application.
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