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  • Author Author: amgalbu
  • Date Created: 9 Dec 2015 8:38 AM Date Created
  • Views 766 views
  • Likes 2 likes
  • Comments 7 comments
Related
Recommended
  • ccs
  • ledroadtestplus
  • msp430fr133

LEDRoadTestPlus - Post 5

amgalbu
amgalbu
9 Dec 2015

To start developing my app on the LaunchPad, the first thing to do is to install the TI Code Composer Studio (CCS)

The setup can be downloaded from TI website

http://processors.wiki.ti.com/index.php/Download_CCS

 

The installation is very simple and troubles-free. At the end, I also downloaded the code of the firmware installed by default on the LaunchPad from

MSP430FR4133 LaunchPad Development Kit - MSP-EXP430FR4133 - TI Tool Folder

 

I imported the project by clicking Project -> Import CCS Projects…

image

I unzipped the MSP-EXP430FR4133_Software_Examples_windows.zip file I download from the TI website and clicked “Browse” in the above dialog box to select the folder with the projects (alternatively you can select the option “Select archive file” and browse for the zip file)

image

 

Click “Finish” to import the project into the workspace and start hacking

image

 

The out-of-the-box demo source code is very interesting because it gives us useful tips

 

Retentive memory (Battery backup)

There are 16 word registers available for use. They are defined in msp430fr4133.h


/*************************************************************
* Backup RAM Module
*************************************************************/
#define __MSP430_HAS_BACKUP_RAM__                /* Definition to show that Module is available */
#define __MSP430_BASEADDRESS_BACKUP_RAM__ 0x0660
#define BAK_RAM_BASE           __MSP430_BASEADDRESS_BACKUP_RAM__

SFR_16BIT(BAKMEM0);                           /* Battery Backup Memory 0 */
SFR_8BIT(BAKMEM0_L);                          /* Battery Backup Memory 0 */
SFR_8BIT(BAKMEM0_H);                          /* Battery Backup Memory 0 */
SFR_16BIT(BAKMEM1);                           /* Battery Backup Memory 1 */
SFR_8BIT(BAKMEM1_L);                          /* Battery Backup Memory 1 */
SFR_8BIT(BAKMEM1_H);                          /* Battery Backup Memory 1 */
SFR_16BIT(BAKMEM2);                           /* Battery Backup Memory 2 */
SFR_8BIT(BAKMEM2_L);                          /* Battery Backup Memory 2 */
SFR_8BIT(BAKMEM2_H);                          /* Battery Backup Memory 2 */
SFR_16BIT(BAKMEM3);                           /* Battery Backup Memory 3 */
SFR_8BIT(BAKMEM3_L);                          /* Battery Backup Memory 3 */
SFR_8BIT(BAKMEM3_H);                          /* Battery Backup Memory 3 */
SFR_16BIT(BAKMEM4);                           /* Battery Backup Memory 4 */
SFR_8BIT(BAKMEM4_L);                          /* Battery Backup Memory 4 */
SFR_8BIT(BAKMEM4_H);                          /* Battery Backup Memory 4 */
SFR_16BIT(BAKMEM5);                           /* Battery Backup Memory 5 */
SFR_8BIT(BAKMEM5_L);                          /* Battery Backup Memory 5 */
SFR_8BIT(BAKMEM5_H);                          /* Battery Backup Memory 5 */
SFR_16BIT(BAKMEM6);                           /* Battery Backup Memory 6 */
SFR_8BIT(BAKMEM6_L);                          /* Battery Backup Memory 6 */
SFR_8BIT(BAKMEM6_H);                          /* Battery Backup Memory 6 */
SFR_16BIT(BAKMEM7);                           /* Battery Backup Memory 7 */
SFR_8BIT(BAKMEM7_L);                          /* Battery Backup Memory 7 */
SFR_8BIT(BAKMEM7_H);                          /* Battery Backup Memory 7 */
SFR_16BIT(BAKMEM8);                           /* Battery Backup Memory 8 */
SFR_8BIT(BAKMEM8_L);                          /* Battery Backup Memory 8 */
SFR_8BIT(BAKMEM8_H);                          /* Battery Backup Memory 8 */
SFR_16BIT(BAKMEM9);                           /* Battery Backup Memory 9 */
SFR_8BIT(BAKMEM9_L);                          /* Battery Backup Memory 9 */
SFR_8BIT(BAKMEM9_H);                          /* Battery Backup Memory 9 */
SFR_16BIT(BAKMEM10);                          /* Battery Backup Memory 10 */
SFR_8BIT(BAKMEM10_L);                         /* Battery Backup Memory 10 */
SFR_8BIT(BAKMEM10_H);                         /* Battery Backup Memory 10 */
SFR_16BIT(BAKMEM11);                          /* Battery Backup Memory 11 */
SFR_8BIT(BAKMEM11_L);                         /* Battery Backup Memory 11 */
SFR_8BIT(BAKMEM11_H);                         /* Battery Backup Memory 11 */
SFR_16BIT(BAKMEM12);                          /* Battery Backup Memory 12 */
SFR_8BIT(BAKMEM12_L);                         /* Battery Backup Memory 12 */
SFR_8BIT(BAKMEM12_H);                         /* Battery Backup Memory 12 */
SFR_16BIT(BAKMEM13);                          /* Battery Backup Memory 13 */
SFR_8BIT(BAKMEM13_L);                         /* Battery Backup Memory 13 */
SFR_8BIT(BAKMEM13_H);                         /* Battery Backup Memory 13 */
SFR_16BIT(BAKMEM14);                          /* Battery Backup Memory 14 */
SFR_8BIT(BAKMEM14_L);                         /* Battery Backup Memory 14 */
SFR_8BIT(BAKMEM14_H);                         /* Battery Backup Memory 14 */
SFR_16BIT(BAKMEM15);                          /* Battery Backup Memory 15 */
SFR_8BIT(BAKMEM15_L);                         /* Battery Backup Memory 15 */
SFR_8BIT(BAKMEM15_H);                         /* Battery Backup Memory 15 */

To retent the value of a variable, just declare a variable as follow


volatileunsignedchar * mode = &BAKMEM4_L;                   // mode flag

LCD Handling

The MSP430FR4133 LaunchPad features an on-board LCD (see Figure 8). This LCD is driven by the internal LCD driver on the MSP430FR4133 device

image

 

Each LCDMEM register is eight bits, controlling up to eight segments. The FH-1138P is a 4-mux LCD, so four COM pins are needed from the MSP430FR4133. With four COM pins, each segment pin controls four bits or segments. This means that each LCDMEM register controls two segment pins, as shown in Table 4. Note that LCDMEM14 to LCDMEM17 and LCDMEM20 and higher are not used due to layout considerations.

Each alphanumeric character A1 to A6 is controlled by two adjacent LCDMEM registers for efficiency and ease of use in software. This allows for a single 16-bit memory access to control the whole character, as opposed to split memory regions requiring separate memory accesses.

 

image

 

For example, to write a character “0” in position A1, we have to switch on segments a,b,c,d,e,f.


image

This is accomplished by writing 0xF8 in LCDMEM2 and 0x00 in LCDMEM3

The LCD controller also features blink. To make a segment blink, one can set the corresponding bit in the LCDBMEM array

 

Power management

MSP430 features several low-power modes, as shown below

The MSP430 has one active mode and five software selectable low-power modes of operation. An interrupt event can wake up the device from any of the five low-power modes, service the request and restore back to the low-power mode on return from the interrupt program.

The following six operating modes can be configured by software:

 

Active mode AM

All clocks are active

Low-power mode 0 (LPM0)

CPU is disabled

ACLK and SMCLK remain active.

MCLK is disabled

Low-power mode 1 (LPM1)

CPU is disabled

ACLK and SMCLK remain active.

MCLK is disabled

DCO’s dc-generator is disabled if DCO not used in active mode

Low-power mode 2 (LPM2)

CPU is disabled

MCLK and SMCLK are disabled

DCO’s dc-generator remains enabled

ACLK remains active

Low-power mode 3 (LPM3)

CPU is disabled

MCLK and SMCLK are disabled

DCO’s dc-generator is disabled

ACLK remains active

Low-power mode 4 (LPM4)

CPU is disabled

ACLK is disabled

MCLK and SMCLK are disabled

DCO’s dc-generator is disabled

Crystal oscillator is stopped

 

The most commonly used is Low Power Mode (LPM) 3, since the ACLK remains active and the peripherals continue to work normally. Peripherals’ interrupt can then wake up the CPU to perform further processing

To suspend main loop and enter LPM3, one can set the corresponding status register (SR) bit

        __bis_SR_register(LPM3_bits | GIE);         // enter LPM3

To exit LPM (for example inside an interrupt routine) and resume the main loop, the following instruction is required

            __bic_SR_register_on_exit(LPM3_bits);                // exit LPM3

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Top Comments

  • amgalbu
    amgalbu over 9 years ago in reply to tomaja +1
    Hi Dragan the doc with all these info is available here http://www.ti.com/lit/ug/slau595a/slau595a.pdf Cheers Ambrogio
  • tomaja
    tomaja over 9 years ago in reply to amgalbu

    Thanks! I somehow missed that one...

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  • amgalbu
    amgalbu over 9 years ago in reply to DAB

    Thanks DAB!

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  • amgalbu
    amgalbu over 9 years ago in reply to balearicdynamics

    Thanks Enrico!

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  • amgalbu
    amgalbu over 9 years ago in reply to tomaja

    Hi Dragan

    the doc with all these info is available here

    http://www.ti.com/lit/ug/slau595a/slau595a.pdf

     

    Cheers

    Ambrogio

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  • balearicdynamics
    balearicdynamics over 9 years ago

    Good and complete. And good idea image

     

    Enrico

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