Heads Up on an Upcoming RoadTest: Ultra96

I think whoever is doing this road test is in for some heavy work. We have seen that with the recent MiniZed board and the Basys3, and this board can do even more. It really is a single-board computer (4 ARM cores) with an attached FPGA. And the latter is quite powerful (with 150k logic cells). Using this for AI or machine learning will be a challenge.

What I would like to do with that board is building a stand-alone logic analyzer. With the OLS there is a quite powerful FPGA core available (and with the DemonCore there is a variant adding extensive triggering). The Ultra96 adds an even faster FPGA and much more memory to the mix, and the ARM cores can run the GUI. The UltraScale+ comes with its own Mali 400 GPU, and even has DSP elements for post-processing. That would be cool, although probably not the intended use case (the product selector lists flight navigation and missiles...)

Having Arm-based, Xilinx Zynq UltraScale+ it seems this board can take on some processing. To learn about the processing capability of this board for starters I would do a PMOD Sensor based learning project. And with this one can estimate how the board performs with the learning algorithms; something on the lines of IOT sensor based learning.

Cheers

Related to Ultra96, take a look at this blog to learn why we chose a Delkin MLC Utility card rather than an inexpensive retail card for the Ultra96 kit.

Storage Insights #1 - Why Not All SD Cards are Created Equal

Bryan

i was reading this article on Xilinx about A section about training the BNN is in progress and will be added soon.

May I know if is it available?

I don't know. I'll ask around to see if I can get you answer.

Randall

I went back and looked again who created it. Andreas Schuler, not a Xilinx employee I believe. The section you refer to has not been updated since last May.

I'm not sure which location is in question on Xilinx.com, but Andreas did get the BNN design posted on the Xilinx Wiki -- https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841949/Zynq+UltraScale+MPSoC+Accelerated+Image+Classification+vi…

Is that what you are looking for?

Bryan

weiwei2

Cheah,

See Bryan's comment above.

Is this what you are looking for?

The url given Bryan is the same one I refer to

https://xilinx-wiki.atlassian.net/wiki/plugins/servlet/mobile?contentId=18841949#content/view/18841949

In on that article it is mentioned a section on training the bnn will be added hence I am interested with it

Hi

Andreas Schuler here.

The design is basically a transformation of the PYNQ design. As PYNQ is Python and Jupiter Notebook based, the Accererated Image Classification (AIC) is based on Petalinux (with Ubuntu on top) and C.

You can use following Link as a guidline for training and generating binary weights:

https://github.com/Xilinx/BNN-PYNQ/tree/master/bnn/src/training

We used a script from here:

German Traffic Sign Benchmarks to read in the road sign images (readTrafficSigns.py), unfortunately we can not publish the modified script as it has no legal disclaimer from the original Autor.

Further more:

As we do a brute force search within the image, we need to dismiss random background. To achieve this, we added a "junk class" and ignored it.

Another unfortunate point is: Xilinx changed the hoster of the Wiki, so we try to get the permissions again to update the Wiki, as we already have the update for the next Vivado version.

Andreas

(Employee at Missing Link Electronics, Project Lead of the AIC Demo)