CY8CKIT-042-BLE Bluetooth® Development Kit - Review

Table of contents

RoadTest: CY8CKIT-042-BLE Bluetooth® Development Kit

Author: migration.user

Creation date:

Evaluation Type: Evaluation Boards

Did you receive all parts the manufacturer stated would be included in the package?: True

What other parts do you consider comparable to this product?: null

What were the biggest problems encountered?: Documentation available for creating a custom BLE profile is obscure at best. Considerable effort is required in understanding the Custom profile creation which is quite a contrast when compared to how easy Cypress PSOC makes implementation of other stuff.

Detailed Review:

THE KIT:

PSOC BLE 42 is packaged professionally and contains all components to get one started.

IMG_20150308_155924 (1).jpg

FIRST IMPRESSIONS:

  1. Preloaded program, controlling intensity of  LED on BLE dongle with CAPSENSE, runs smoothly.
  2. Getting BLE Dongle to work with CySmart(windows) out of the box was a problem due to outdated firmware. But was fixed quickly by updating the firmware using PSoC Pragrammer.
  3. Remaining examples also run without any glitch.
  4. Detailed datasheet of predefined blocks is really useful to quickly get it working.



PROGRAMMING:

  1. Programming the kit is as simple as drag and drop ( most of the time) using PSoC Creator.
  2. There are lots of predefined  blocks in all categories, Digital, Analog, System, Ports and Pins, Communication etc to name a few.
  3. The basic flow of programming the kit would  be as follows



      • Select , Drag and Drop the required block from

            the Component Catalog then connect using wires.

 

 








      • Configure the selected block from properties

                 (i.e Instantiation name, Clock Source,

                  Pin mapping etc)


 


 

 










      • Write the accompanying code ( i.e in  main.c ) to initialize the block,

                      get the output (ADC’s output),handle the interrupt, etc.

                      API's are generated with "build Application"

   







   4.  Datasheets of every component are easily accessible from the settings window.

   5.  Once the designing and writing the code is done, the project is compiled and hex file is dumped to the kit.

   6.  If BLE is used, the kit can can be connected to the mobile using mobile app or to the PC using the CySmart and the USB dongle provided in the box.


Our Project:

Portable ECG Monitoring Over BLE

Block Diagram
Detail explanation in attachment.


Custom Profile Creation:

  1. We will be adding more details in a project blog,the gist of it is here:
  2. Due to lack of a profile for ECG, a custom profile for ECG data ( 2 byte) was required
  3. Understanding of BLE can be found at https://learn.adafruit.com/introduction-to-bluetooth-low-energy?view=all
  4. An example to start with  http://www.cypress.com/?rID=107488
  5. Steps we followed are
    • Just send 2 byte of data over custom profile
    • Replace the random 2 byte with the ADC’s output
    • To verify the above stage, we generated the sine wave using the Current DAC and the external resistor ( for current to voltage conversion). Digitized sine wave using ADC and transmitted over BLE.
    • Log of CySmart was saved and parsed through a python script(attachment) to extract ADC’s data. It was plotted in excel as shown alongside.

Windows App:

Basic app was developed to receive the ECG data( in this case a sine wave), Demo here:

 

Work in progress:

  • Analog Front End : To capture ECG signal using Instrumentation amplifier from body to ADC.
  • Android App.
  • Windows App : Further Improvements required.


Summary:

  • Pros:
    1. Excellent crossover between analog and software domains.
    2. Comprehensive documentation and examples available online.
    3. Design can be GUI oriented or coded entirely thus making this excellent for hobbyist and professionals alike.


  • Cons:
    1. Custom profile creation and usage requires intermediate to advance programming knowledge.
    2. Programmable Internal passive components (R,C) should have been included.
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