Step Down Converter EVM - Review

Table of contents

RoadTest: Step Down Converter EVM

Author: Morfeo_Matrixx

Creation date:

Evaluation Type: Power Supplies

Did you receive all parts the manufacturer stated would be included in the package?: True

What other parts do you consider comparable to this product?: TPS548A20, TPS53515, TPS549A20, TPS54020

What were the biggest problems encountered?: Not a big problem but a minor inconvenience, the EVM should have a Jumper to disable the 50 Ohm input resistor on the load step transient response test circuit, so a weak output drive function generator can be used without desoldering the resistor.

Detailed Review:


Module Description


The TPS54A20EVM-770 received for this Road Test is based on the TPS54A20 Series Capacitor Synchronous Buck Converter chip, designed for 12 V input, 1.2 V output and 10 A full load current.

It has input and output screw terminals, as well as many convenient test-points and ground hookups for connecting scope probes.



Intended Usage


Its main usage case is as a point-of-load voltage regulator in power delivery systems, where a large ratio of input voltage to output voltage (like 10-to-1) is needed. This includes supplying power to DSP, FPGA, ASIC, DDR memory chips, etc.


TPS54A20 Specification Summary

SpecificationTest Conditions





Vin voltage range81214V
Out voltage (fixed in EVM-770)0.5


Line regulationIo=5A, Vin=9.2 to 14V+/- 0.04%
Load regulationVin=12V, Io=0 to 10A+/- 0.03%
Input rippleIo=10A90mVpp
Output ripple20mVpp
Operating frequency2MHz


Series Capacitor Topology Benefits


The TPS54A20 is a DC/DC is a two-phase synchronous series-capacitor buck converter designed to provide up to a 10-A output current. The input (Vin) is rated for 8 V to 14 V; the switching frequency is set at a nominal 2 MHz for each side, giving an effective frequency of 4 MHz . The high-side and low-side MOSFETs are incorporated inside the package along with the gate drive circuitry, and an external resistor divider allows for a narrow adjustable output voltage. Additionally, the TPS54A20 provides adjustable slow start and undervoltage lockout inputs.



                         (Above Image provided in document SLVA750 by Texas Instruments)


The series capacitor buck converter topology, shown in the above figure, combines the switched capacitor with the switched inductor approach, in a hybrid 2 phase single conversion stage. The series capacitor is inserted between the high side and low side switch of phase A. The drain of the phase B high side switch is connected to the source of the phase A high side switch instead of the input supply.


The main differences between a series capacitor buck converter and a conventional buck converter are that the duty ratio of the high side switches is doubled, switching occurs with half the drain-to-source voltage experienced by switches in a buck converter, inductor current balancing is automatic, and inductor current ripple is decreased. All these factors are favorable for high frequency and high conversion ratio converters.


This overcomes many of the challenges faced by conventional buck converters operating at high frequencies: excessive switching loss and narrow high side switch pulse width. In high voltage conversion ratio (e.g. >5:1) and high current (e.g. >10 A) a large portion of total loss is switching loss. A very short on-time of the high side switch is challenging as well. Narrow pulse widths can be difficult to generate effectively.


A major drawback of the topology is a limitation of the theoretical maximum output voltage to Vin/4. This is due to a 50% duty cycle limitation and the switch node voltage being Vin/2 when the high side switches are on. In practice, the maximum output voltage is about Vin/5 when converter losses are taken into account.

Strengths & Weaknesses


  • Its capacitive conversion topology allows for a high current output in a surprisingly compact board area (a typical circuit footprint of 160 mm2 can be achieved due to the usage of small inductors).
  • It has a very narrow output voltage range, 0.5 to 2 V. This is due to a limitation of the series capacitor topology which can provide a theoretical maximum of Vin/4 (Vin/5 in practice taking losses into account).
  • Large ratio of input voltage to output voltage (typical 10-to-1)
  • Efficiency is not outstanding, 82% at full load (not fully tested)
  • Excellent line and load regulation (+/- 0.04% line, +/- 0.03% load) and no noticeable start-up output voltage overshoot.



Test Setup


The EVM-770 is provided with input/output connectors and test points that allow an easy test setup. A regulated power supply providing 12V and at least 2A must be connected to J1, and the load to J4 through suitable wires (take into account that maximum load current capability is 10 A).


  • Input/Output Voltages & Ripple: Scope probes can conveniently be hooked up to Test-point TP1 to monitor the input voltage ripple (with TP2 providing ground reference), and  to TP7 for monitoring the output voltage and ripple (with TP8 as the ground).



  • Power-up transient response: I've used the J2 jumper that is tied to the Enable signal; by removing it you trigger the TPS54A20 start-up delay (programmed by setting the UVLO threshold voltages set by R2 & R3). TP12 can be used as the probe's ground reference.



  • Load transient response: The PCB has a dedicated area for this test, providing a MOSFET and 2 low value resistors to achieve a 9A load. I've used a Function Generator hooked up to the scope's  CH4 and TP9 (gate of the MOSFET), with the CH3 scope probe measuring the output current as a voltage across the resistors (100mV=10A), in TP11, with its corresponding grounding connected to TP10 and TP12.

In order to not overload the MOSFET and load resistors, the input signal must have a low duty cycle (I used a pulse function with 200 Hz and a 1% duty cycle).

Here I discovered the only minor drawback of the circuit: If using a function generator that doesn't provide 50 Ohm output (as mine), you get a lower signal input to the MOSFET. So a Jumper disabling R11 should be useful here.





Test Results


  • Input/Output Voltages & Ripple: An input ripple voltage (CH1) of less than 40 mVpp and an output voltage ripple of 16.8 mVpp (CH2) were measured with 0A load, well within specs.




  • Power-up transient response: A start-up delay of 1,180 msec. was measured, with a clean output voltage ramp-up of aprox. 500 usec. with no overshoot. CH1 is input, CH2 output, CH3 Enable step input signal.




  • Low input voltage threshold test: A low voltage threshold of 9.1V (programmed with R2 & R3) was measured, with a clean ramp-down with no undershoot.



  • Load transient response: Function Generator for step-load signal set to a 3 Vpp pulse with 200 Hz and a 1% duty cycle (CH4);  output current measured in CH3 as a voltage across the resistors (100mV=10A); CH2 is AC-coupled measuring the output voltage transient response. the DMM is measuring the DC output voltage during this test.





The TPS54A20EVM-770 evaluation board is very easy to setup and test. The series-capacitor two-phase synchronous topology allows for an amazingly small PCB area for a design handling up to 10A of continuous output load, with the additional benefit of a decent 82% efficiency, excellent 0.04% line & load regulation and low output ripple.