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Polls Poll: What Has Impeded You In Applying for the USB104 A7: Artix-7 FPGA Dev Bd RoadTest
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  • Author Author: rscasny
  • Date Created: 26 Oct 2020 7:22 PM Date Created
  • Last Updated Last Updated: 11 Oct 2021 3:00 PM
  • Views 1246 views
  • Likes 2 likes
  • Comments 7 comments
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Poll: What Has Impeded You In Applying for the USB104 A7: Artix-7 FPGA Dev Bd RoadTest

We are currently enrolling applicants for the USB104 A7: Artix-7 FPGA Dev Bd RoadTest.

 

You can submit an pplication by going here: https://www.element14.com/community/create-roadTestApp!input.jspa?containerID=1069&containerType=700&roadTestID=2234&isR…

 

About the USB104 A7: Artix-7 FPGA Dev Bd RoadTest

The first Digilent board to adhere to an industry-standard form factor, the USB104 A7 brings power and versatility to your PC/104 stackable PC. The board measures 95.89 mm x 90.17 mm and provides the standard mounting holes with standoffs included.

 

The USB104 A7 features the industrial temperature rated Xilinx Artix-7 XC7A100T. ArtixRegistered-7 devices provide the highest performance-per-watt fabric making the USB104 A7 ideal for size, weight, and power (SWaP) constrained projects.

 

image

 

I/O is provided with on-board LEDs and push-buttons, and, of course, three 12-pin Pmod ports. A SYZYGY-compatible Zmod port is available as well, allowing for high-speed signal acquisition and generation. An onboard USB hub and controller conveniently interfaces the USB104 A7 with JTAG, UART, and a parallel data interface (DPTI) through a single connection. The DPTI data transfer interface provides host-to-FPGA data transfer and is easily managed with Digilent’s Adept 2 application. This ease of use and high-speed data transfer is especially useful for deployed systems.

 

Features

Artix-7 100T (XC7A100T-1CSG324I) FPGA

  • Logic Cells: 101,440
  • DSP Slices: 240
  • Memory: 4,860
  • GTP 6.6Gb/s Transceivers: 8
  • I/O Pins: 300

USB

  • USB-JTAG Programming circuitry
  • USB-UART bridge
  • Adept DPTI/DSPI data transfer interface for high speed host to FPGA data transfer
  • Onboard USB hub eliminates the need for multiple USB cable connections

Expansion Connectors

  • One standard SYZYGY port (Zmod)
  • Three standard Pmod ports

Form Factor

  • PCB adheres to PC/104 form factor and includes the standard mounting holes
  • Board is 3.775” x 3.550” (95.89 mm x 90.17 mm).

Additional Information

  • Datasheet
  • Reference Manual
  • Schematic

 

Question: What Has Impeded You In Apply for the USB104 A7: Artix-7 FPGA Dev Bd RoadTest?

  • usb104 a7: artix-7 fpga dev bd roadtest
  • community roadtest survey
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Top Comments

  • DAB
    DAB over 5 years ago +3
    The spirit is willing, but my ADD makes it a no go. DAB
  • hlipka
    hlipka over 5 years ago +2
    When looking at this road test, it makes me wonder whether there should be a statement "this is what we expect from this road test". The range of reviews can be very broad here - from just testing that…
  • michaelkellett
    michaelkellett over 5 years ago +2
    The problem with this board, from my point of view, is that the access to the FPGA pins is compromised by the use of three PMOD and one ZMOD (I mistyped that as ZMAD which may be prophetic) ports. For…
  • DAB
    DAB over 5 years ago

    The spirit is willing, but my ADD makes it a no go.

     

    DAB

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  • wolfgangfriedrich
    wolfgangfriedrich over 5 years ago

    I successfully applied for an ARTY-S7 some time ago, I have no new ideas to make this a good roadtest.

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  • Fred27
    Fred27 over 5 years ago

    I'm planning to apply. I thought I'd see how the custom Zmod board that's part of my Eclypse Z7 road test first though.

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  • michaelkellett
    michaelkellett over 5 years ago

    The problem with this board, from my point of view, is that the access to the FPGA pins is compromised by the use of three PMOD and one ZMOD (I mistyped that as ZMAD which may be prophetic) ports.

    For less money you can get a (smaller) board with Artix FPGA, DDRAM, Ethernet phy and power supplies with sensible connectors giving simple access to all the FPGA pins. Such boards are suitable for using in low volume production but this one isn't.

    And then there is the old issue - to make this board do something useful will require weeks of work.

     

    MK

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  • genebren
    genebren over 5 years ago

    I have a fair amount of experience with FPGAs and CPLDs, but for me this to too big of a hammer for my typical nail.  I tend to be interesting in devices that I can design into a project/product that I am likely to build.  I am not too interested in devices that come only in pin-grid array (PGA) packages as I do not have the equipment or skill to deal with that kind of soldering.  I also don't need that much computing/processing power.  Being more of a hobbyist these days (retired) I like to build small low power devices, targeted to much simpler needs like home automation, robotics and other fun projects.

     

    I appreciate that there are others on this site that want and/or need devices in this class and my goal here is to stay out of their way and let them have a better chance of building something cool with these 'hot' parts.

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  • hlipka
    hlipka over 5 years ago

    When looking at this road test, it makes me wonder whether there should be a statement "this is what we expect from this road test". The range of reviews can be very broad here - from just testing that the provided examples work (and can be used as documented) up to doing really complex projects with an embedded MCU and doing a high-speed design. People who could do the former might think "this is not enough knowledge to review this" and not apply because of this. I probably have the knowledge to do a medium-complexity design, but I know it will take quite some effort and time, and therefore think twice before applying (esp. since such a board is not as useful afterwards as e.g. a DMM or a scope)

    Setting the expectations right could help, but OTOH it might lead to getting less diverse applications. But when the required knowledge for a road test is very specialized (or in-depth), and the RT sponsor would be fine with seeing several test on a not-so-deep level, it might be worthwhile to mention it.

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  • hugohu
    hugohu over 5 years ago

    I have never worked with FPGAs. Nor, DDR3, etc.

     

    Out of my pay grade.

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