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Getting Started with the USRP B205mini-i software defined radio platform

alexwonglik1

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The USRP B205mini-iUSRP B205mini-i is a flexible and compact platform that is ideal for both hobbyist and OEM applications. It is designed by Ettus ResearchTm and provides a wide frequency range (70 MHz to 6 GHz) and a user-programmable, industrial-grade Xilinx Spartan-6 XC6SLX150 FPGA. The RF front end uses the Analog Devices AD9364 RFIC transceiver with 56 MHz of instantaneous bandwidth. The board is bus-powered by a high-speed USB 3.0 connection for streaming data to the host computer. The USRP B205mini-i also includes connectors for GPIO, JTAG, and synchronization with a 10 MHz clock reference or PPS time reference input signal.

 

The getting started guide walks you through the steps you need to take in order to use the USRP B205mini-i.USRP B205mini-i. You will learn how to install the software driver and GNU radio in Windows or Ubuntu, connect the devices, run examples and create an FM radio receiver from scratch. When you start using the device, there are some examples that come with the driver. You can run the real-time Discrete Fourier Transform (DFT) example. The options for the executable (./rx_ascii_art_dft) are frequency (–freq), sampling rate (–rate), gain (–gain), bandwidth (–bw), and reference level (–ref-lvl). The terminal will show the flow of execution, list the parameters, and graph the result:

 

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Project Example - Using GNU Radio to Design a Frequency Modulation (FM) Receiver

The FM receiver takes the modulated signal (i.e. radio waves under the VHF band) as input and produces the original audio signal ranging from 20 Hz to 20 kHz.

First of all, in the terminal, the GNU Radio Companion will be open. Then, the following blocks will be added: Sample Rate, Frequency, USRP and QT GUI Sink. Next, a low pass filter is used.

Notice that the audio signal bandwidth ranges from 200 Hz to 20 kHz. Once the lowpass filter has been added, the next step is to perform the FM demodulation.

 

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Since the output signal is audible, this signal is sent to the sound card - which is actually a digital to analog converter with a sample rate of, in general, 96 kHz. A Rational resamples block is used, to perform an x/y operation, where x (interpolation) is the output frequency, and y (decimation), is the input frequency. Finally, Audio sink block is added, so that the output signal will be played through speakers. After being generated, the python script is sent to USRP B205mini-i and executed. The output signal is displayed in the time and frequency domain, as seen below.

 

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Find the complete getting started guide and project examples on the Digilent Reference Page.

  • in reply to nathandumont

    Thank you   - that was really helpful to my understanding of this technology

  • in reply to 14rhb

    Only just seen this article via Twitter.  I'm just wrapping up my roadtest review for this board so more on it soon.  To answer the three points you raised:

     

    1. GNURadio flow-graphs actually generate Python scripts which can be run.  The GNURadio Python module is very sophisticated though, beyond setup and parameter passing all the number crunching and data flow are handled in C++ modules so once the flow graph is instantiated there is little to no Python overhead in passing data through the system.  This makes it easy to design at the system level but very performant.  As a rule nothing you design in GNURadio is handled by the hardware, the USRP source block allows you to configure some hardware settings for acquisition but it does no significant DSP.

     

    2. In the default setup the FPGA is doing a few bits but is really glorified glue logic and FIFO.  It holds all the sections together (clock generation, ADC and DAC and the USB interface) but it's not responsible for any of the processing in the GNURadio window.

     

    3. Historically this has been very hard.  generally you have to write your own DSP blocks manually.  You can't really build useful applications without a general-purpose processor either you embed one in the FPGA fabric (which can be inefficient) or you tie one to it. Ettus make "Embedded" USRP variants which add an ARM host processor along with the FPGA fabric to do the high-level processing. I'd not seen the RFNoC stuff that mentioned, but it does explicitly say on that page that it is only supported on the E, X and N hardware variants, i.e. not the USB versions like the B205.  To use the FPGA resources in those other units you also have to use special blocks (see the block name starts RFNoC for the FFT in the example on that external page) which implement their processing via the FPGA instead of the generic ones as used in this example which all run on the PC (and have no dependency on what hardware you're getting your samples from).

  • in reply to 14rhb
    • I assume you are asking about signal processing. For the USRP B205 mini, that will be on the FPGA device.
    • This page may give you some idea about FPGA role in SDR: https://kb.ettus.com/RFNoC

  • Hi

     

    A good introduction, thank you.

     

    There's several posts on E14 currently discussing SDR and perhaps you could answer some questions I have pondered for sometime and been unable to answer from the internet.

    • Once a GNURadio schematic is created and run, where is the majority of that processing undertaken - on the SDR's FPGA or on the host PC ?
    • If not answered in that last question, what purpose does the FPGA play?
    • If processing is undertaken on the host PC, is it possible to wrap that design, and download to the FPGA, such that it is a stand alone RF system without a host PC?