Could someone please offer their opinion on whether my circuit would work well for turning on an output via a CPLD. The output voltage at PIN0 will be 3.3V. I want logic 1 to turn on my Q1.
Regards, oldmanraskers.
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Could someone please offer their opinion on whether my circuit would work well for turning on an output via a CPLD. The output voltage at PIN0 will be 3.3V. I want logic 1 to turn on my Q1.
Regards, oldmanraskers.
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Hi,
I set up your circuit on LTSPICE and there are a couple problems. First of all I am assuming that you are putting a load between Vdd and the drain of your MOSFET. Second your choice of IRF9530 will not work. IRF9530 is a P channel Enhanced MOSFET. An N Channel MOSFET like IRF511 will work in your application if the load is between Vdd and the drain of the MOSFET.
Here is a schematic:
If you can run LTSPICE I can send the simulation to you too. Let me know if you hve further questions.
John
Hi oldmanraskers,
Here is the SPICE file for the simulation that I ran. If you don't have the LTSpcie program yet just go to the Linear Technologies web site and down load it as it is free. It seems that I do not know how to give you an executable file in this posting. Here is the bitmap of the circuit that I put into LTSPICE. You can download the program and draw the schematic and run it. Signal Supply V1 is 3.3Volts square wave with 2 uSecond rise and fall time. 10 millisecond Duration and 20 millisecond Period. Power supply V2 is just 12 Volt DC.
John
