CPLD P-Mosfet Output Circuit - Will it Work?

Question

Could someone please offer their opinion on whether my circuit would work well for turning on an output via a CPLD. The output voltage at PIN0 will be 3.3V. I want logic 1 to turn on my Q1. Regards, oldmanraskers. 
 Attachments:

jw0752 · Answer

Hi oldmanraskers, Here is the SPICE file for the simulation that I ran. If you don't have the LTSpcie program yet just go to the Linear Technologies web site and down load it as it is free. It seems that I do not know how to give you an executable file in this posting. Here is the bitmap of the circuit that I put into LTSPICE. You can download the program and draw the schematic and run it. Signal Supply V1 is 3.3Volts square wave with 2 uSecond rise and fall time. 10 millisecond Duration and 20 millisecond Period. Power supply V2 is just 12 Volt DC. John

johnbeetem · Answer

oldmanraskers wrote: 
 
 I'm using the opto because I'm experimenting with stuff, I guess I could use a standard NPN transistor - I am using the circuit to drive small solenoids that will eventually form a lock - they draw about 240mA. It appears to me now, that I have my FET in upside down, and in regards to spike suppression I will need some kind of flywheel diode I think. 
 Regards, oldmanraskers. 
 For driving that kind of load, I would suggest using NPN Darlington pairs, such as the TI ULN2003A or similar. Those can sink a lot of current and have built-in flyback diodes. To get a lot of current through a FET, you need a gate voltage that's higher (or lower for PFET) than your normal logic voltages. For example, you get a small IC called a "high side switch" that uses a charge pump to boost the an NFET's gate voltage.

CPLD P-Mosfet Output Circuit - Will it Work?

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STMICROELECTRONICS ULN2003A DARLINGTON ARRAY 7NPN, 2003, DIP16