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Nick Gray

 

Nicholas Gray

Nicholas has worked in the Semiconductor industry for over 30 years and has authored a number of published articles about data converters (ADCs and DACs) and signal integrity issues.

 

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  • Hi Nick,

     

    I've got a National LMP2011 opamp, non-inverting gain of 2, driving the input of a TI ADS7957SDBT.ADS7957SDBT. ADC.  Although the opamp has very low offset voltage and current, I'm seeing about 40 millivolts offset on the output of the opamp.  The offset disappears when not connected to the ADS7957.  What in the ADC input could cause such a significant offset on the opamp output? I've tried using very low resistance for the gain-setting resistors on the opamp, but that makes no difference. (This is one of those unfortunate situations where I've used two different manufacturers so they will tend to just blame each other.)

     

    Thanks,

     

    Barry Volain

  • in reply to Former Member
    Hello Barry, Unfortunately, the ADS7957SDBT.ADS7957SDBT. data sheet does not indicate the equivalent input circuit to the ADC. However, most SAR (Successive Approximation Register) ADCs have a sampling network at the input. The basic operation of this type of circuit would be to connect an internal capacitor to the input for maybe two or three clock cycles, then disconnect the input from the capacitor and connect the capacitor to the ADC itself and the. This is repeated for each sample converted. Each time the capacitor is reconnected to the input, the charge on it is different from what it was when previously connected and current is required from the source to charge that capacitor. Whether the ADC will tend to discharge the capacitor toward ground or charge it to the supply or some voltage in between depends entirely upon the converter itself and its input design. The result is that, when the capacitor is reconnected and the output of the op-amp is pulled away from its equilibrium point, after a small time delay it will react by trying to pull its output back to where the op-amp is again at equilibrium. But the capacitor is being charged to the op-amp output voltage and, by the time the op-amp reacts to its output being pulled away from equilibrium, its output is already at or near equilibrium and its reaction causes the op-amp output to overshoot where it wants to be. This typically continues for a anywhere from 1 to a few oscillation cycles, but before it can settle, the ADC input capacitor is disconnected from the ADC input, resulting in the ADC “capturing” a voltage that may be incorrect. At any rate, the DC voltage measured at the op-amp output may be either high or low and the amount of apparent error will depend upon the design of the ADC input, the ADC sample rate and the current capabilities and speed of the amplifier. Ironically, a slow amplifier would be better. This means that we need to compensate for the charge current required for the ADC input capacitor. If we put an additional capacitor at the ADC input that is about ten times the input capacitance of the ADC, most of the input current pulse required to charge the ADC input capacitor would come from that capacitor. However, most op-amps can not tolerate a capacitive load and will oscillate with a capacitive load. The answer here is to use a small series resistor between the op-amp output and the capacitor added at the ADC input. I find that this works extremely well. The ADS7957SDBT.ADS7957SDBT. data sheet shows its input capacitance to be 15pF, so an input capacitance of about 150pF seems to be indicated. Now, we want to maintain a reasonable time constant so that the ADC input can settle quickly enough to avoid linearity and distortion problems. The ADS7957SDBT.ADS7957SDBT. data sheet does say that the impedance of the driving source should be no more than 50 Ohms, but this is with the 15pF input capacitor. If we add another 150pF, we can tolerate more resistance because the input pulse is lower and voltage recovery is faster than without the additional capacitance. I would simply use a series resistor of about 75 Ohms. I would not be as concerned about the DC voltage at the ADC input as I would be about whether the circuit converts accurately. Because of circuit tolerances and gain errors, you probably will not get exactly the output you expect and I would be most concerned about circuit linearity. The best way to determine if the circuit is linear is to apply 5 to 6 different voltages to the amplifier input with each step being EXACTLY the same size. Record the digital output from the ADC for each case, then be sure that difference in the digital count of each conversion is separated from the next one by the same amount, within about 4 counts. You can improve the accuracy of this measurement process by taking 8 readings at each voltage input setting then using the average of the 8 readings. Please let me know how this works out. - Nick Gray
     
     
     
Reply
  • in reply to Former Member
    Hello Barry, Unfortunately, the ADS7957SDBT.ADS7957SDBT. data sheet does not indicate the equivalent input circuit to the ADC. However, most SAR (Successive Approximation Register) ADCs have a sampling network at the input. The basic operation of this type of circuit would be to connect an internal capacitor to the input for maybe two or three clock cycles, then disconnect the input from the capacitor and connect the capacitor to the ADC itself and the. This is repeated for each sample converted. Each time the capacitor is reconnected to the input, the charge on it is different from what it was when previously connected and current is required from the source to charge that capacitor. Whether the ADC will tend to discharge the capacitor toward ground or charge it to the supply or some voltage in between depends entirely upon the converter itself and its input design. The result is that, when the capacitor is reconnected and the output of the op-amp is pulled away from its equilibrium point, after a small time delay it will react by trying to pull its output back to where the op-amp is again at equilibrium. But the capacitor is being charged to the op-amp output voltage and, by the time the op-amp reacts to its output being pulled away from equilibrium, its output is already at or near equilibrium and its reaction causes the op-amp output to overshoot where it wants to be. This typically continues for a anywhere from 1 to a few oscillation cycles, but before it can settle, the ADC input capacitor is disconnected from the ADC input, resulting in the ADC “capturing” a voltage that may be incorrect. At any rate, the DC voltage measured at the op-amp output may be either high or low and the amount of apparent error will depend upon the design of the ADC input, the ADC sample rate and the current capabilities and speed of the amplifier. Ironically, a slow amplifier would be better. This means that we need to compensate for the charge current required for the ADC input capacitor. If we put an additional capacitor at the ADC input that is about ten times the input capacitance of the ADC, most of the input current pulse required to charge the ADC input capacitor would come from that capacitor. However, most op-amps can not tolerate a capacitive load and will oscillate with a capacitive load. The answer here is to use a small series resistor between the op-amp output and the capacitor added at the ADC input. I find that this works extremely well. The ADS7957SDBT.ADS7957SDBT. data sheet shows its input capacitance to be 15pF, so an input capacitance of about 150pF seems to be indicated. Now, we want to maintain a reasonable time constant so that the ADC input can settle quickly enough to avoid linearity and distortion problems. The ADS7957SDBT.ADS7957SDBT. data sheet does say that the impedance of the driving source should be no more than 50 Ohms, but this is with the 15pF input capacitor. If we add another 150pF, we can tolerate more resistance because the input pulse is lower and voltage recovery is faster than without the additional capacitance. I would simply use a series resistor of about 75 Ohms. I would not be as concerned about the DC voltage at the ADC input as I would be about whether the circuit converts accurately. Because of circuit tolerances and gain errors, you probably will not get exactly the output you expect and I would be most concerned about circuit linearity. The best way to determine if the circuit is linear is to apply 5 to 6 different voltages to the amplifier input with each step being EXACTLY the same size. Record the digital output from the ADC for each case, then be sure that difference in the digital count of each conversion is separated from the next one by the same amount, within about 4 counts. You can improve the accuracy of this measurement process by taking 8 readings at each voltage input setting then using the average of the 8 readings. Please let me know how this works out. - Nick Gray
     
     
     
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