Maths is not my strong point but I think I've got basic calculation correct. So: 4 MOSFETs connected in parallel, on a heatsink with a Sil-Pad isolator. Assume that the MOSFETS are connected correctly and are sharing the load equally.
| Thermal Calculation | |||
| Max Power | 150 | W | From design limit |
| Package Dimension | 1.648 | cm^2 | From datasheet for MOSFET, case and tab |
| Package Dimension | 0.255 | in^2 | Converted |
| Parallel MOSFETS | 4 | From design | |
| Power/MOSFET | 37.5 | W | Power shared equally |
| Max J Temp | 175 | C | From datasheet for MOSFET |
| Ambient | 35 | C | Inside Case, assumed when running hot |
| Rjmb | 0.5 | C/W | From datasheet for MOSFET1 |
| Thermal Paste | 0 | C-in^2/W | Sil-Pad doesn't require paste |
| Isolating Pad | 0.3 | C-in^2/W | Sil-Pad K-6 datasheet |
| Heatsink | 1.4 | C/W | Natural convection, from datasheet |
| Junction to case | 18.75 | C | Power per mosfet * Rjmb |
| Case to Heatsink | 2.86875 | C | Power per mosfet *((paste + pad) * package dimension) |
| Heatsink | 52.5 | C | Power per mosfet * heatsink |
| Ambient | 35 | C | |
| Total | 109.11875 | C | |
| %Max J Temp | 62.35% | ||
MOSFET datasheet: https://4donline.ihs.com/images/VipMasterIC/IC/NEXP/NEXP-S-A0002881467/NEXP-S-A0002882763-1.pdf?hkey=6D3A4C79FDBF58556ACFDE234799DDF0
Sil-Pad K-6 datasheet: https://www.farnell.com/datasheets/90833.pdf
The "tricky" bit to watch out for is the area calculation for the Sil-Pad to reach the case to heatsink impact, particularly as I'm converting square cm to square inches. K-6 seems to be pretty good, but I have seen some quite high C/W figures for silicon pads and this calculation is trying to convert from an area-based thermal resistance to a C/W thermal resistance to keep the units the same through the calculation. EDIT: I'm aware the 0.3 figure will be based on pressure applied and the overall area used during manufacturer's testing, unlikely to be TO-220 sized! However, I do need to include something in the calculation with the intention of seeing how close to maximum allowed I get. I'll confirm with real life testing of course and I'm also trading that 0.3 value against the heatsink's 1.4 value as I will in fact be using a fan to bring that figure down.
Alse:
1 The MOSFET datasheet table 5/Fig.4 on page 4, covers the Junction to case temperature but it isn't clear. It states a MAX of 0.5K/W (0.5 C/W) but is this a max allowed or a max it can be - on the basis that it can be lower if the power through the MOSFET is pulsed more quickly? According to the graph, 0.5 is based on a pulse duration that never exceeds half the cycle (single shot through to theta = 0.5) once that cycle reaches approx. 0.06seconds but these MOSFETs will be used continuously as part of a DC load, in other words theta would be 1 but this is not shown on the graph. Therefore, 0.5 doesn't seem appropriate and also seems inordinately low for a TO-220 package.
