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Ask an Expert Forum Can you help identify this symbol?
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Can you help identify this symbol?

opalko
opalko over 3 years ago

As part of an encoder chip for the keyboard on an Apple II Plus I came across this symbol in the schematic that I can't identify. Any idea what this is?

Thanks

Robert Opalko

image

Here is where I clipped it from (also note the one on the other side denoted "ØP"??)

image

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  • jc2048
    jc2048 over 3 years ago in reply to shabaz +5
    Having both a weak pull-up and a stronger one that gets enabled when it's needed (by a clock phase) was probably a way to get the chip power consumption down a bit. I've seen the symbol elsewhere in…
  • jc2048
    jc2048 over 3 years ago in reply to jc2048 +5
    Here's another example of the symbol's use. This is the internal schematic of a Signetics 2501 SRAM from a 1975 datasheet. They've drawn it a bit more like the usual MFET symbol. Intel preferred this…
  • scottiebabe
    scottiebabe over 3 years ago +4
    Best guess is depletion mode nmos logic, but I'm not 100% certain. Take care
  • colporteur
    0 colporteur over 3 years ago

    I would go with a variable resistor but I do get some confusion by having a second similar component shown without the wiper connected. 0P means zero potentiometer or a resistor. Guessing mind you. 

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  • scottiebabe
    0 scottiebabe over 3 years ago

    Best guess is depletion mode nmos logic, but I'm not 100% certain. Take care 

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  • phoenixcomm
    0 phoenixcomm over 3 years ago

    Good luck, is it a restive keyboard?

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  • dougw
    0 dougw over 3 years ago

    This looks a schematic of circuitry internal to a chip and it looks like these could be substrate resistances. Note the connection is to VGG.

    I seem to recall seeing this symbol eons ago, but it was before I was fully sentient, so all I can recall is the visual.

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  • shabaz
    0 shabaz over 3 years ago

    It might just be a FET of different construction/dimensions, perhaps used in place of a resistor (normal resistors take up a lot of real-estate on a chip), so perhaps they invented that symbol. Although they violate that concept by using the device as a FET when they connected the phiP and phiIP (on mobile, don't know how to draw the Phi symbol) as inputs to a couple of the gates. Anyway, perhaps they are lower-performance FETs basically. 

    All my comment above is pure speculation however..

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  • dougw
    0 dougw over 3 years ago in reply to shabaz

    φ is one of the special characters under the insert menu. Does the mobile view not have this menu?

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  • shabaz
    0 shabaz over 3 years ago in reply to dougw

    No idea. It was quicker to respond as above than to start clicking on tiny menus/icons.

    I don't know when I'll ever absolutely need to type such characters while on mobile except once in a blue moon, so to me that didn't seem interesting to investigate.

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  • shabaz
    0 shabaz over 3 years ago in reply to shabaz

    Google'd a bit, and found this photo/diagram from Ken Shirriff's blogs showing an NMOS gate:

    image

    As can be seen in the photo, the gate is composed of two devices, the right side looking similar but slightly different, because that's a different FET (DMOS FET).

    In the photo, the right side FET has it's gate connected to 'out' rather than +5V, but other than that, no real difference to what the Apple schematic shows. So I think the symbol they're using happens to kind-of look like a resistor because that's what they are using the device as. 

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  • jc2048
    0 jc2048 over 3 years ago in reply to shabaz

    Having both a weak pull-up and a stronger one that gets enabled when it's needed (by a clock phase) was probably a way to get the chip power consumption down a bit.

    I've seen the symbol elsewhere in material about chip design, so I don't think it's unique to Apple.

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  • jc2048
    0 jc2048 over 3 years ago in reply to jc2048

    Here's another example of the symbol's use. This is the internal schematic of a Signetics 2501 SRAM from a 1975 datasheet. They've drawn it a bit more like the usual MFET symbol.

    image

    Intel preferred this, where they've simply shown where the implanted channel for the depletion device sits. This is from an application note explaining how the SRAM cells worked.

    image

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