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Blog Ultra-Low-Power Design using NXP's i.MX 7ULP
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  • Author Author: kjachim
  • Date Created: 27 Jun 2019 8:46 PM Date Created
  • Views 370 views
  • Likes 2 likes
  • Comments 0 comments
  • low-power design
  • i.mx 7ulp
  • ultra low-power mcu
  • crossover processing
  • nxp
  • applications_processors
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Ultra-Low-Power Design using NXP's i.MX 7ULP

kjachim
kjachim
27 Jun 2019

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Over a decade ago, I had my first article published on the topic of Smart Speed, with the idea that power consumption must be as important a design consideration for mobile communications devices as speed and ability.  The article has a lot of things right, but I think it really failed to grasp the magnitude of the importance of power consumption in the broader market and it certainly did not do justice to the challenges that engineers would face to achieve the next-generation power requirements.

 

From a consumer standpoint, everything is about mobility and connectivity. Functionality previously limited to desktop computers is now sitting in our back pockets (and our children’s backpacks).  And my home is communicating with itself each day more often than I am communicating with my own family. Devices are adding features, adding graphics, adding connectivity.   All of these adds come at a cost to battery life.  The present battery technology roadmap has a 2x capacity improvement every decade, while the power demand will probably increase at the rate of 2x every 18 months or so.  This presents a problem.  Or if you are talking to an NXP engineer – it is an opportunity.  What if we could design an applications processor that runs a rich OS, but operated at MCU level low-power?

That is what NXP achieved with its i.MX 7ULP. Focused on low-power since the product’s inception, every design trade-off was made with low power in mind.  Looking at process technology, IP selection, and system architecture allowed us to achieve an ultra-low-power applications processor for the market.

Process Technology

Using Fully Depleted Silicon On Insulator (FD-SOI) technology, NXP designers are able to fine-tune the i.MX 7ULP for both optimal performance and power.   By construction, FD-SOI enables much better transistor electrostatic characteristics versus conventional bulk technology. The buried oxide layer lowers the parasitic capacitance between the source and the drain, and it also efficiently confines the electrons flowing from the source to the drain, dramatically reducing leakage currents. Biasing with FD-SOI is a hallmark of this technology, as it allows designers to optimize the system for performance (forward body biasing) or low power (reverse body biasing).   It also allows for asymmetrical biasing which is critical for low-power designs. 

IP Selection

At the heart of the i.MX 7ULP is the Arm Cortex-A7 core.  The Arm cores are known for being more power efficient than other processors, but not all Arm cores are created equal.  For example, the Arm Cortex-A7 is 60% more power efficient than the closely-related Cortex-A9 core, making it a great selection for the i.MX 7ULP. Additionally, choosing right-sized GPU and connectivity peripherals was also important.  Integrating both a 2D and 3D graphics accelerator, allows designers to use the right graphics for their UIs with minimal overhead.  The addition of these graphics accelerators in such a low-power device enables the i.MX 7ULP to modernize graphics for the wearable markets. 

System Architecture

Many systems use a combination of an Arm Cortex-A core and an Arm Cortex-M core.  The idea of heterogeneous multicore processing (HMP) is not new and the benefits are well-documented. However, the i.MX7ULP takes HMP to the next level through the use of two completely isolated domains - an application domain with the Cortex-A7 and a real-time domain with the Cortex-M4. Isolating the domains means separate cores, but also means separate buses, clocks, and power domains. Engineers can quickly shut down and power gate the entire applications domain when it is not in use, but also quickly turn it on when needed.   NXP calls this heterogeneous domain computing architecture, and an example of where this provides benefits is in a sensor hub application where you have all of the sensing and analytics running on the Cortex-M4, and then only need to wake up the Cortex-A7 side for interaction with the UI on the product.

 

Ultra-low-power electronics design enables systems to become portable, lightweight and to minimize energy consumption.  So, when you are enjoying the fact that you did not have to bring your smart watch charger with you on your weekend vacation or that you are not replacing 4 AA batteries in your child’s game controller every month, thank an engineer for that ultra-low-power design.

 

Ready to learn more?  i.MX 7ULP is in production now and customers can get started here: nxp.com/imx7ulp

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