Rendering of the 25-nanometer wide FTJ developed by Science Tokyo. (Image Credit: Yutaka Majima of the Royal Society of Chemistry)
Engineers at Science Tokyo developed a 25-nanometer-wide ferroelectric tunnel junction (FTJ) memory that improves performance while scaling downward. Despite its tiny size, it still outperforms larger types, challenging the assumption that miniaturization weakens resistance contrast in extremely thin memory components. This is a significant breakthrough as electronics demand smaller, denser, and more efficient memory. The team believes the technology could be used for low-power applications and could fit standard CMOS manufacturing.
The 25nm memory has a titanium/titanium oxide (Ti/TiOx) top electrode, a 3 nm yttrium-doped hafnium oxide ferroelectric tunnel barrier, and a platinum bottom electrode integrated into a nanocrossbar structure.
It works by reversing polarization within the ultrathin ferroelectric barrier to alter the electrostatic potential across the junction. This process changes how easily electrons quantum tunnel from one electrode to the other. Due to the ultra-thin barrier, the electron wavefunction passes through it rather than undergoing thermally activated transport. And slight polarization-induced changes in barrier height or width modify the tunneling probability. As a result, the device creates two resistance states (ON/OFF) representing digital data storage.
Temperature-dependent switching and resistance hysteresis behavior in 3 nm-thick nanocrossbar FTJs. (Image Credit: Nanoscale)
During electrical testing, the smallest FTJ with a 26 x 24 nm2 junction area achieved a tunneling electroresistance (TER) ratio surpassing 2.2 x 103. This is higher than the 71 TER achieved by the 30 nm FTJs. The team also performed temperature-dependent transport measurements at 9 K and 300 K, demonstrating nearly temperature-independent conduction behavior in the resistance states. Current transport was therefore dominated by quantum tunneling instead of thermally activated leakage.
In addition, the researchers observed asymmetric current scaling while the active junction area shrank from 42,000 nm2 to 255 nm2. In this case, the OFF-state current decreased (scaling slope of 1.1) more rapidly compared to ON-state current (slope of 0.30). That indicates nanoscaling minimized conductive leakage pathways and grain-boundary effects. Doing so improved resistance contrast instead of worsening at smaller dimensions.
Science Tokyo researchers believe this technology could be practical for future low-power nonvolatile memory. They also say the Ti/TiOx/Y-doped HfO2/Pt structure supports CMOS-oriented hafnium oxide processing, simplifying integration into semiconductor manufacturing processes. Plus, the fast resistance switching and extremely thin ferroelectric barrier make scaled FTJs a good choice for in-memory computing, neuromorphic computer architectures, and edge devices requiring lower power consumption and a reduced footprint.
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