The main purpose of this lab is to illustrate how to create a new Zynq project using UltraFast Design Methodology within Vivado Webpack.
Zynq Proccesing System (PS) has a configurable set of built-in peripherals and direct access to Programmable Logic (PL) that can build any custom IP. So, I we need we could create dedicated soft IP in PL and use it in PS.
1. Create a new Zynq project in Vivado
Below there is gallery with step-by-step instructions how to create a new project. Each step is described in image description.
| {gallery} Creation of new project in Vivado |
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Click on Create Project. |
Set the project name and project location. |
This will be a RTL-based project, so please leave the radio button for RTL project selected. |
Select VHDL as target language. Click Next two times. |
Select target device: xc7z007sclg225-1. |
Click Finish button. |
There is Vivado design cockpit. |
2. Create a new block design in Vivado
Below there is gallery with step-by-step instructions how to create a block design. Each step is described in image description.
| {gallery} Creation of a new block design |
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Select Create Block Design. |
Enter the block design name. |
Select Add IP from the top bar of Diagram window. From search window choose ZYNQ7 Processing System. |
Click Run Block Automation to perform automatic connection of IPs in block design. |
This wizard automatically detects if is required to connect external interfaces for FIXED_IO and DDR. FIXED_IO are dedicated peripherals in the Zynq PS like UARTs, USB or Ethernet. Click Ok. |
Click the Save Block Design button to save the block design. You could launch customizations by double-click on the ZYNQ7 PS IP block. |
At this screen you could reconfigure ale PS features. |
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