Path-to-Programmable Trainees: How's It Going and Next Steps

I'm on the way to finishing up soon as well. My plan had been to finish the modules this week; but that isn't going to happen at this point; not until next week. At any rate; as a few of us have mentioned, the training is a lot about "how to use Vivado" and not really about the nuts and bolts about how an FPGA works. I don't have any formal experience programming FPGAs so this has been a big learning curve for me (as expected; and it has been fun!). So when they start talking about Verilog, for example, I spend some time researching that and how it works.

I would say that this training assumes that the learner already knows a decent amount about the hardware and this will teach them how Vivado works. It shows things like how to add peripherals like BRAM, import hardware templates and so on, but not a lot of detail on what those items really are; and especially not how & when to use them. There has been almost nil mention of logic gates; which kind of sit at the core of what FPGAs can do.

Can we get more details about the next module? What about the project? I'm ready to order a bunch of stuff to build what I had been planning (a line follower) but wasn't sure if we would be guided towards some more specific type of thing.

And - could we get new dates posted based on the current status?

Thanks again!

I'm on the way to finishing up soon as well. My plan had been to finish the modules this week; but that isn't going to happen at this point; not until next week. At any rate; as a few of us have mentioned, the training is a lot about "how to use Vivado" and not really about the nuts and bolts about how an FPGA works. I don't have any formal experience programming FPGAs so this has been a big learning curve for me (as expected; and it has been fun!). So when they start talking about Verilog, for example, I spend some time researching that and how it works.

I would say that this training assumes that the learner already knows a decent amount about the hardware and this will teach them how Vivado works. It shows things like how to add peripherals like BRAM, import hardware templates and so on, but not a lot of detail on what those items really are; and especially not how & when to use them. There has been almost nil mention of logic gates; which kind of sit at the core of what FPGAs can do.

Can we get more details about the next module? What about the project? I'm ready to order a bunch of stuff to build what I had been planning (a line follower) but wasn't sure if we would be guided towards some more specific type of thing.

And - could we get new dates posted based on the current status?

Thanks again!

I've been watching the progress (or lack of progress) of everyone. It looks like at least some of you are ready for the next module. So, I'll starting sending it this week.

As far as your question/comment regarding" not much on logic gates" and "a lot on tool use (Vivado)....."

I went into this project knowing that some of you would have little knowledge of FPGAs and some of you would have had decent knowledge or familiarity of FPGAs. I wanted both types of people; I wanted to see how you handled the training in both cases.

The training does assume you know something about the hardware (FPGA, Soc). But your comment makes me want to ask the question: if someone has an electrical or electronic engineering degree, how much times in your course-major classes were spent on programmable logic devices, by percentage? My next question would be, if you do not have an ee degree, do you have a CS degree? If so, do you feel the course covers enough information such that you can do something (a project) even though you may not know the intricate details of the hardware?

On a separate not, I'd like to respond to your comment on a different level. Full disclaimer: the following is my impression and/or opinion....

Since I have meetings with the sponsor, I am given presentations (which one could consider training though that's not the intent) so I can better understand their direction. This helps me help them create projects. One of the problems of adopting programmable logic design has been the need to know the hardware. This problem has bigger than I even suggest. Software engineers traditionally have been at a disadavantage because hardware has not always been their specialty. Well, this is changing. They are starting to build platforms that have frameworks which contain levels of abstraction and overlays or "wrappers" such that software engineers can do PLD hardware design without intimately knowing the hardware; but tool knowledge would be essential. This field is evolving rapidly and I anticipate that programmable logic hardware design will require less hardware knowledge than in decades past.

Randall

-Path to Programmable Program Manager