This time the HACK uC has a new memory map,
as the table shows, this memory map includes two BSP components; SWITCH and LEDS. The SWITCH register only maps one of the buttons in the board, BTN1, the other one corresponds to computer reset. The LEDS register maps the four available user leds in the board. In this case, the LEDS are mapping in positons 8 to 11 with the objective to simulate a clock divider with a software counter.
There is other register has bit addressing for configuration, PWM CNF x.
This register corresponds only to the PWM peripheral and configures the Clock Source (CS) according to following table
The HACK uC has an Clock Wizard IP to multiply a Clock Source, in this case the 12 MHz available in the board. As you can observe, the multipliers are 1x, 2x, 4x, 8x and 16x.
The PWM module consist of a small logic to control the reset state for a counter IP by comparation or system reset. at the end a comparator generates the duty cycle. The registers MAX and CMP have the control over Frequency and Duty Cycle respectively.
A simplified schematic shows the datapath for the PWM module control. The PWM CNF x register configures the clock source from the Clock Wizard IP. This allows a faster frequency in the PWM module with only one external clock. It is only a register wirting to a full frequency, duty cycle and clock source configuration. In addition, the reset wire is common to all the synchronous components in the implementation.
The PWM CS and MAX are configured to apprimate the same frequency between them with different Clock Sources.
With the actual implementation is not possible a generator syncronization but it could be in a future test. In the other hand, the PWM registers are used to control the increment of a variable for the LEDS register. This allow a visualization in bit changes at a low frequency with the bit addressing mapping in the register. The code implemented to test the peripherals and the software counter is below. The program takes the value of the SWITCH register and update a variable to increment or decrement the counter accordinto the button value. The PWM CMP registers act as counters too, consequently, a registers updates the next when the value reached the MAX value.
// Engineer: Miguel Angel Castillo Martinez // Code to configure the three PWM peripheral instances // and regulate the Duty Cycle for RGB LEDs in a cooperative way // with the software. In addition, a DELAY software behavior is implemented. @32766 D=A @TIME M=D @512 D=A @TIME2 M=D @1 D=A @16400 M=D @1024 D=A @16401 M=D @512 D=A @16402 M=D @2 D=A @16416 M=D @2048 D=A @16417 M=D @128 D=A @16418 M=D @3 D=A @16432 M=D @4096 D=A @16433 M=D @768 D=A @16434 M=D (END) @16384 D=M @DEC D;JEQ @increment M=D @CONT 0;JMP (DEC) @increment M=-1 (CONT) @16402 MD=M+1 @16401 D=M-D @LED1 D;JEQ @F 0;JMP (LED1) @16402 M=0 @increment D=M @16385 M=M+D @16418 MD=M+1 @16417 D=M-D @LED2 D;JEQ @F 0;JMP (LED2) @16418 M=0 @16434 MD=M+1 @16433 D=M-D @LED3 D;JEQ @F 0;JMP (LED3) @16434 M=0 (F) @tick M=0 (DELAY) @tick MD=M+1 @TIME D=M-D @DELAY D;JGT @END 0;JMP
It is a bit large because is implemented in HACK assembler. If we introduce more instructions there is a collision risk in the memories, to avoid only select the Read First in the Operating Mode for IP R/W Memories. My actual implementation is a bit clumpsy, consequentrly, there are some timming violations. The next video shows the demo commented. WARNING!!!: My video is very noisy by my computer fans, please be careful before play.