TI Webinar: Understanding Capacitive Isolation Technology for Industrial Applications

Anwsers to Wbinar Questions

1. On Slide 23 it says that it is only applicable for GaN. Can you elaborate?

100kV/us CMTI is also applicable for GaN/SiC  [we didn’t say “only”, so that’s a minor correction here]. As some Power designs move towards higher voltages and switching speeds to improve efficiency,  GaN/SiC FETs becomes more relevant in the power stages to support this. However, when these switching events happen at the System level, they manifest themselves to an Isolator as CMTI events. So that is why, having

2. Aren't ISOW with integrated power isolators considerably more noisy? I've seen some problems with them in e2e forum during the past year.

Let’s breakdown this answer into two parts.

a. First there is the data component of the Isolator.

i. The amplitude of the signal transferred over the barrier is very small and so the energy content is quite small.

ii. When measured on an emissions setup, this signature is very close to the noise floor and is inconsequential.

b. For the power path, now we have to transfer >0.5W of power across the barrier.

i. Because this is an isolated power supply, this has to be done using an isolated switching DC-DC converter.

ii. The amplitude level has to be therefore larger than the data path, and therefore this relatively adds to the emissions signature

iii. However, despite this relatively higher signature, the ISOW still meets CISPR 22 emissions standard and is better than the competition.

iv. For a given emissions standard limit line and for a given device, the board size, the cables, the traces etc., all act as antennae and can amplify the baseline signature. This varies from setup to setup and is therefore a common question. Also ,these threads have been addressed on our forums.

3. What's the isolation method recommend for high speed data acquisition? (e.g. a logic analyzer transferring data over USB, or a power metering IC/ADC that needs to burst out data to a MCU)

This depends on the data rates involved. For example, our ISO77XX family of data isolators can go up 100Mbps and our LVDS chips can go up to 150Mbps. Depending on the system protocols involved, a solution can be chosen. We do not have an integrated USB solution as on date, but for the data isolation component, the above isolators can be considered as a starting point.

Anwsers to Wbinar Questions

1. On Slide 23 it says that it is only applicable for GaN. Can you elaborate?

100kV/us CMTI is also applicable for GaN/SiC  [we didn’t say “only”, so that’s a minor correction here]. As some Power designs move towards higher voltages and switching speeds to improve efficiency,  GaN/SiC FETs becomes more relevant in the power stages to support this. However, when these switching events happen at the System level, they manifest themselves to an Isolator as CMTI events. So that is why, having

2. Aren't ISOW with integrated power isolators considerably more noisy? I've seen some problems with them in e2e forum during the past year.

Let’s breakdown this answer into two parts.

a. First there is the data component of the Isolator.

i. The amplitude of the signal transferred over the barrier is very small and so the energy content is quite small.

ii. When measured on an emissions setup, this signature is very close to the noise floor and is inconsequential.

b. For the power path, now we have to transfer >0.5W of power across the barrier.

i. Because this is an isolated power supply, this has to be done using an isolated switching DC-DC converter.

ii. The amplitude level has to be therefore larger than the data path, and therefore this relatively adds to the emissions signature

iii. However, despite this relatively higher signature, the ISOW still meets CISPR 22 emissions standard and is better than the competition.

iv. For a given emissions standard limit line and for a given device, the board size, the cables, the traces etc., all act as antennae and can amplify the baseline signature. This varies from setup to setup and is therefore a common question. Also ,these threads have been addressed on our forums.

3. What's the isolation method recommend for high speed data acquisition? (e.g. a logic analyzer transferring data over USB, or a power metering IC/ADC that needs to burst out data to a MCU)

This depends on the data rates involved. For example, our ISO77XX family of data isolators can go up 100Mbps and our LVDS chips can go up to 150Mbps. Depending on the system protocols involved, a solution can be chosen. We do not have an integrated USB solution as on date, but for the data isolation component, the above isolators can be considered as a starting point.