Hello,
I was trying to figure out the functionality of the "HDMI_TX_EN" pin with location constraint set to FPGA PIN Y23.
There is no information in the documentation on how this pin is routed and what exactly it controls. Based on its name I can only guess its functionality.
Would love to see a more detailed description on the board's HDMI topology, used silicon chips and initial configuration of those components.
For example, there is no information on what is the default configuration of the U56 (How is the OTP configured?) or what TMDS redriver chips are used.
The "List of Features" in the hardware guide list only "HDMI TX and RX Interfaces" (Without anything else), which I consider quite insufficient for the purposes of the documentation.
Please add the missing information.
Thank you