Board Definition File for UltraZed-EG starterkit

All of the Vivado Board Definition Files for the Avnet SBCs and SOMs can be found in the git repo on github:

https://github.com/Avnet/bdf

Instructions for installing them into Vivado can b found in the README:
https://github.com/Avnet/bdf/blob/master/README.md

If you want to build a known-good Vivado project for the UltraZed-EG that is capable of running Linux and accelerators developed in Vitis, then you might want to checkout this blog article:

Avnet HDL git HOWTO (Vivado 2020.1 and earlier)

--Tom

The Starter Kit includes the UltraZed-EG IO Carrier Card (IOCC). You won't find a specific BDF for the UltraZed-EG SK, but you will for ultrazed_3eg_iocc

https://github.com/Avnet/bdf/tree/master/ultrazed_3eg_iocc

Bryan

Many Thanks for your help Tom and Bryan, the git hub helps a lot.

Now I have another problem I can't create a project with the "source ./make_uz_iocc_sensor.tcl" command.

4628.contentimage_191921.png

Do you may know why this doesn't work?

Hi there,

What branch / tag are you working from?  Our tip does not always build everything.  You need to be working from the tag that is specified in the build instructions for the project you are working from.

For example, the TCL project file specified in that build script does not exist at tip.

Open that TCL in an editor and look at the variables assigned.  The project name is the script file/files that are going to be called out later on in make.tcl, which are listed under the ProjectScripts folder.

If you look at the tag

https://github.com/Avnet/hdl/tree/uz_iocc_sensor_UZ3EG_IOCC_20170511_115000/Scripts

There is a matching set of files, however I cannot say that is the correct tag for what you are trying to build, you need to go back and follow the build instructions for the project you want to build.  That is what we claim will build and have tested with the tool version that we specify in that project.  If you are not using that exact combination, we cannot really help you as I'm sure you can appreciate the permutations involved in this many projects / this many boards / this many tool versions is quite a lot and we could not hope to test everything.

--Dan

Thank for your help so far.

I checked out the newest Tag of the UZ_IOCC_Sensor from the Avnet git hub.

Than I tried to generate the corresponding project, but unfortunately it and up in the following error:

7774.contentimage_191922.png

I tried with Vivadoe 16.2 and Vievado 16.4 but both didn't work.

Any Idea what I'm doing wrong?

I just looking for an example Project for an SPI Interface to a Thermocouple (MAX31855) on the Xilinx Zynq with the UltraZed-EG Starter Kit.

Cheers

Manuel

Hi there,

First, which reference design instructions are you working with?

Second, knowing the exact tag name will help me more than describing which one you have.  Looking through what I think is the latest, I do not see a call out for an ES1 part.  In the snip you posted, the script tells you the error and the line in the script to look at.  This does not match what I have as a line that calls out a board / part number.

It is saying you do not have the ability to build for an ES1 part.  That required a special license back at the birth of the UltraZed-EG.  My understanding is that is why that design was not continued.  You will need to change that to a non-ES part.  The instructions for that reference design will explain how to accomplish this.

If you are not using a reference design, you need to use another tag or call out another board at the line that is indicated.

Lastly, do you have the BDFs installed?  That would be in the instructions, which you should be following.

--Dan

Hi,

I'm using UZ3EG_IOCC_Sensor Example VIV2016_4.pdf as reference instruction.

Maybe the problem is the UltraSCale+ ES1 License.

Because i never got a software voucher shipped with my Ultra Zed-EG Starter Kits.Because of that, I expected that the license is not needed anymore. Probably this is the problem!

Do you now how i could get to such a licenses? Is there a possibility to load it online?

BR

Manuel

Hi there,

Which tag are you using?  See page 8 of the reference document.

Did you receive RED UltraZed boards?  If not, you will not get a license as you should not be building for ES1.  As I mentioned, you will want to change that.

If you do not have ES1 hardware, you should not build for that.  The design will not work properly as the ES1 vs nonES chips are slightly different.

If you have ES1 hardware and did not get a license, work with your local FAE.  If not, as I suggested, you will need to re-target to the latest board and hope that the design still works.  If it does not, you will need to port it.

As I asked before, did you end up pulling down the BDF repository?  If not, you will need to clone that repository as well so that you can point to the newest version of the UltraZed-EG IOCC BDF instead of what is currently being used.

--Dan

Hy Dan,

I'm using the 'uz_iocc_sensor_UZ3EG_IOCC_20170127_224417' tag.

I Have a dark green Ultra Zed Board.

The BDF master repository I haved already  cloned from the git hub.

So do you think I cant't use the UZ_IOCC_Sensor Tutorial?

BR

Manuel

Hi there,

A green board is production silica, not ES.  That is why you did not get a license and this design is not for this board.

make sure the BDF is located in the proper folder:

[projectName]/bdf

[projectName]/hdl

You will then want to add into your make.tcl file or just copy paste lines 135-137 into the TCL console.

You can find this in the 2020.1 make file:

https://github.com/Avnet/hdl/blob/2020.1/Scripts/make.tcl#L135

You will then want to also modify line 87 in the tag you pulled down to point to the latest BDF (i believe change it to 1.1)

https://github.com/Avnet/hdl/blob/uz_iocc_sensor_UZ3EG_IOCC_20170127_224417/Scripts/ProjectScripts/uz_iocc_sensor.tcl#L8…

com:ultrazed_eg_iocc:part0:1.0

to

com:ultrazed_eg_iocc:part0:1.1

I am not sure you will be able to get the design to build 100%, but there is no reason you shouldn't be able to leverage the design.  While I cannot support porting this design to some other system the above is where I would start to try to make this design work.  You should also evaluate the various code that configures the project and see if you can leverage that.

That is for the Block Design:

https://github.com/Avnet/hdl/blob/uz_iocc_sensor_UZ3EG_IOCC_20170127_224417/Scripts/ProjectScripts/uz_iocc_sensor_bd.tcl

For the Software and constraint file:

https://github.com/Avnet/hdl/tree/uz_iocc_sensor_UZ3EG_IOCC_20170127_224417/Projects/uz_iocc_sensor

Good luck and I hope your porting effort goes well!

--Dan