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Data transfer from PL to PS DDR

Waqas

We are using MiniZed Hardware in our project. We want to move some data from PL side to PS DDR through the control of PL side. We are using AXI datamover IP to transfer data from PL to PS DDR. However, we are not able to see any data in PS DDR after PL has provided data on Streaming Interface of AXI datamover IP.

 Can anyone suggest solution to this problem??

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  • in reply to dyessgg

    How can we map the shared memory as "device memory" or explicit cache invalidate on shared pages

  • in reply to Waqas

    How is the PS attempting to access the "shared" memory written by the PL?  I'm mmap in your userland Linux  code.  If that is the case (which I would HIGHLY discourage), you might be able to add MAP_SHARED as the flags argument.  I'm not 100% sure it would do the correct thing to map the physical memory (DDR) into the virtual address space of the process reading the memory and make it non-cacheable.

    The proper way to do this under Linux would be to reserve the shared DDR memory with Device Tree entries (scope of which is beyond this discussion).  You would then write a kernel module to access the shared memory on behalf of the process.  It would do a cache invalidate on the page and then copy from DDR into user space.  

    If you're doing this bare metal on the A-class cores, I believe Xilinx has a cache invalidate function you can call just before you attempt to read from the shared DDR.  I don't recall off the top of my head what it is.  Look for something like XilCache....