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Software Application Development Access upper 16 MB of QSPI Flash
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Access upper 16 MB of QSPI Flash

Former Member
Former Member over 12 years ago

The Zynq QSPI controller only supports 24-bit addressing (16 MB).  The Zedboard Hardware User Guide indicates the full 256 Mb capacity can be accessed via internal bank switching.

Does anybody know how to do this from Linux?  Is it possible to set up MTDs for both the lower and upper address ranges?

Thanks!

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  • Former Member
    0 Former Member over 12 years ago

    Spansion has been working on validating this with the Zedboard and the S25FL-S flash that come with this board, and we have shown it is definitely possible in certain circumstances.

    In Linear mode the QSPI controller is definitely limited to 24b addressing, although it is possible to switch the bank register so this mode can access the higher banks.

    But for Linux and u-boot the QSPI IO mode is more appropriate. In our prototype u-boot code we used the bank address register to enable addressing to span >128Mb (16MB) address space. All legacy flash commands with 3B addressing are proven to work correctly for multi-IO operations, and any single-IO command can also work (the new flash commands expecting 4B address all work with QSPI so long as they are single-IO).

    In our discussions with Xilinx we've learned that the flash extended address register can be used to enable 4B address arguments for the legacy READ commands that normally expect 3B addresses; this works so long as the QSPI controller is configured to expect an extra dummy byte. This is a cleaner way to support extended addressing for single and multi-IO reads.

    Linux MTD support is a work in progress, but we're expecting to have sample code pretty soon.

    Let me know if you are interested in seeing the sample code we have so far.

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  • Former Member
    0 Former Member over 12 years ago

    Spansion has been working on validating this with the Zedboard and the S25FL-S flash that come with this board, and we have shown it is definitely possible in certain circumstances.

    In Linear mode the QSPI controller is definitely limited to 24b addressing, although it is possible to switch the bank register so this mode can access the higher banks.

    But for Linux and u-boot the QSPI IO mode is more appropriate. In our prototype u-boot code we used the bank address register to enable addressing to span >128Mb (16MB) address space. All legacy flash commands with 3B addressing are proven to work correctly for multi-IO operations, and any single-IO command can also work (the new flash commands expecting 4B address all work with QSPI so long as they are single-IO).

    In our discussions with Xilinx we've learned that the flash extended address register can be used to enable 4B address arguments for the legacy READ commands that normally expect 3B addresses; this works so long as the QSPI controller is configured to expect an extra dummy byte. This is a cleaner way to support extended addressing for single and multi-IO reads.

    Linux MTD support is a work in progress, but we're expecting to have sample code pretty soon.

    Let me know if you are interested in seeing the sample code we have so far.

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  • Former Member
    0 Former Member over 10 years ago in reply to Former Member

    Can you tell me where the detailed tutorial about how to access upper 16 MB of QSPI Flash is?Thank you very much!

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