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Problem about access the output signal of vivado blocks

pmuproject

Hello there,

I'm current building a clock source in vivado by using the clk_wiz module. The output clock is the clk_out1 pin on the clk_wiz module. When I finish the design of vivado and export it to SDK I found that there is nothing can be used related to the clk_out1 pin. Just woundering how can I access to the clk_wiz and output the clk_out1 signal to a gpio pin in SDK?

Regards,

Han

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  • 0 in reply to jafoste4

    Hi Josh,

    Thanks for your reply. In my understanding the HD and HP banks of gpio pins are PL GPIO, am I right? I just write the constraint as below:

    set_property PACKAGE_PIN D7   [get_ports {clk_out1_1              }];  # "D7.HD_GPIO_0"

    And I exported it to SDK and tried to output the clk_out1_1 signal on pin 3 which is the pin HD_GPIO0. First I tried use a Hello World code and it didn't work. Then I tried to set the direction of HD_GPIO0 to see the results. But the problem is I don't know the base address of HD_GPIO0 and the ID defined in xparameter.h. How can I output it to the HD_GPIO0 pin? Thanks for your help!

    Regards,

    Han