Actions
Forum Thread Details
  • State Suggested Answer
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 324 subscribers
  • Views 624 views
  • Users 0 members are here
Related

How to understand the swapped pins of UART0/1 on Avnet CC?

wwqiao

Hi,

 

According to Xilinx TRM document, UART0 uses MIO_34 (TX) and MIO_35 (RX), and UART1 uses MIO_32 (RX) and MIO_33 (TX).

 

On the Avenet Carrier Card, UART0's TX MIO_34 is connected to U16 CP2105's TXD_SCI and RX MIO_33 to U16's RXD_SCI. UART1's TX/RX pins are also swapped.

 

How to understand this design?

 

Thanks.

 

-WWQ

Parents Reply
  • 0 in reply to wwqiao

    Hi there,

     

    I think the note is a little confusing, but was meant to explain how this is connected to the USB adapter - if you were to connect to a serial level shifter, you would likely need a different wiring (follow the manufacturers's datasheet).

    If you are implementing the serial to USB device we have, you would want to follow the way that we have designed the Carrier Card.  If you are not following what we did, you will need to implement the design as you need for your circuit per your design and the manufacturer's datasheets.

     

    I believe the point of the note was to alert you to the care needed for this, as mixing the two up will cause issues unless you have brought the signaling out the EMIO pins - which we did not.

     

    --Dan

Children