Hi,
I am using a SI5341 to generate a 400MHz to use as global clock on the UltraZed-EV+.
The SI5341 output buffer supply is +3V3 and the FPGA HP bank is +1V8.
The output buffer common mode voltage for this is 1.1V to 1.3V and swing is 350mV to 510mV. Due to the fact that the FPGA is on the SoM I cannot use ac coupling next to the FPGA.
My question is can I get away with DC coupling if the LVDS voltages are within range of the FPGA or should I use AC-coupling before the SoM Module?