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Problem in Flashing Boot from QSPI in ZEDBOARD

Former Member

Hello all,

I am quite new in hardware design. I am trying to boot a 8-bit shift-register topology written in VHDL from the QSPI memory of the Zedboard. Booting from SD card is successfully completed; but the problem is that I am not able to complete booting it from QSPI. Since the source is a VHDL code, it cannot be exported as a design and no .ELF files are being created. The guide that I used during the flashing process is "Zedboard_boot_guide_IDS141_1_v1_1.pdfu201D.

I'm sorry if there is a duplicate in the forum.

Thanks in advance for your help.

  • 0

    Hello Necati,

     

    The document you refer to is very dated and targets the older Xilinx ISE tool suite. I would suggest that you begin using the current Xilinx Vivado tool suite. The Zynq device on the ZedBoard is supported by the free WebPack Vivado version.

     

    That said I am a little confused about what you are trying to do. Creating a bootable image for either the SD Card or QSPI device requires a minimal Zynq PS (Processor System) design along with your PL (Programmable Logic) design. You would then export this to the SDK and generate an FSBL (First Stage Boot Loader), either a .bin file for SD Card boot or a .mcs file for QSPI boot.

     

    There is a good set of four tutorials that take you though this process posted on the MicroZed Reference Designs page. Tutorial 4 in particular details generating a bootable image. While it targets the MicroZed board you only need to change the board targeted to use with the ZedBoard:

     

    http://zedboard.org/support/design/1519/10

     

    Adam Taylor also has a really good series of blog posts that detail designing with Zynq based boards:

     

    http://zedboard.org/content/microzed-chronicles

     

    -Gary

  • 0

    Dear Gary,

    Thanks for your help and sorry for the late reply. I just had chance to try what you suggested.

    As you preferred and it was shown in tutorials, I was able to implement a "Hello world" boot from QSPI flash. For the next step, I am going to do the same for a 8-bit shift register written in VHDL. So, please correct me if I'm wrong. In order to implement such a design, I must create an IP design of the VHDL code and export it as a hardware to the

  • 0

    (continued from above)
    ...export it as a hardware to the SDK, and provide an .elf file for boot in QSPI flash. By properly assigning correct ports between PS and PL, I believe to flash a boot for QSPI.

    Thank you for your help.

    Best regards,

    Necati

  • 0

    Hello Necati,

     

    You have it pretty much correct. You need to make sure that when you export the hardware design to SDK you check the "include bitstream'" option. You do not need to assign any connections between the PS and the PL if your VHDL is a hardware only block with no interface to the Zynq PS. You just need to include a minimal Zynq PS IP block as shown in the tutorials. The Zynq PS block is required to boot the device and load the bitstream. Then just generate your FSBL and include the FSBL .elf file, then the .bit file, and finally any application .elf file when you generate your .mcs file for programming the QSPI.

     

    -Gary