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ZedBoard Hardware Design Assigning Pins to a Custom Peripheral
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Related

Assigning Pins to a Custom Peripheral

chipslinger
chipslinger over 13 years ago

I'm trying to bring out pins from a custom peripheral, but they're not showing up in the pinout report.

What I did was take the generated register set, add in new i/o signals, new logic, and new components that are in separate files. So, what was once a register set, is now a series of peripherals, like SPI controllers, i/o ports, timers, etc...

I can write/read the registers from a simple diagnostic program, so my hardware seems to actually exist.

When I first created the register set, the only connections were to the AXI bus. There are now about 40 lines that I need to assign to pins.

I've added the file names to the .PRJ and .PAO files. I've figured out that I need to (eventually) add the pin names to the data<project>.ucf file, but right now the pin names don't show up in the pin report, so I get an error if I add them into the ucf file.

How do I make the pins (which are now at the top level of the register set) show up as pins on the device?

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  • chipslinger
    0 chipslinger over 13 years ago

    I originally created a top-level project without external ports, created code, and added ports. How do I go back and make the system see the new ports and connect them to external pins?

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  • chipslinger
    0 chipslinger over 13 years ago

    More broadly speaking: I create a peripheral, I incorporate it into a design, I make changes and add some logic and pins.

    What do I have to do to go back and "refresh" my design so that these changes are incorporated?

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  • chipslinger
    0 chipslinger over 13 years ago

    I'm pretty sure that I'm doing exactly what you say is necessary. However, the pins don't show up on the part after compilation. I used the IP interface wizard to create a register bank. The two files created are:
      - bus_interface.vhd (top level IP file)
      - user_logic.vhd
    I have the ports on bus_interface.vhd. Some connect through to user_logic.vhd, some refer to logic in bus_interface.vhd
    I added the ports to the MPD file.
    I rescanned the user repository
    I see the ports within XPS and have selected MAKE EXTERNAL.
    I can see the ports in the part instantiation template.

    I have simulated the design in modelsim, so I'm pretty sure that the logic isn't being munched away b/c of a design error.

    The ports do not show as external pins in the pinout file, though.

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  • Former Member
    0 Former Member over 13 years ago

    Hi

    To connect a signal in the PL to physical pins you need to use constraints.  There are a couple of examples in UG873, specifically Chapters 3 and 9.

    http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_3/ug873-zynq-ctt.pdf

    Hope that helps
    Matthew

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  • chipslinger
    0 chipslinger over 13 years ago

    Yes, I've gone through that document a few times looking for clues. I just re-read the sections you've suggested.

    Sorry for perhaps not describing my process using the same terminology.

    I'm pretty sure that I am doing what you suggest by adding the constraints to the MPD file, and by mapping the PL to physical pins by selecting them as "MAKE EXTERNAL" within XPS.

    To recap using the terminology you're using....

    If I don't add the signals in the MPD file, they don't show up in PL to physical assignment page. However, after adding the pin to the MPD file and rescanning the user directory, the pin shows up in the PL to physical assignment page. I then select the pins as "MAKE EXTERNAL," clean the project files and recompie. The pins do not show up inside the pinout file. Indeed, if I try to add the pin names to the UCF file, the compiler gives me an error because it does not find the signal names.


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  • Former Member
    0 Former Member over 12 years ago

    If you right-click on the .xmp file in PlanAhead and select "View Instantiation Template" do the pins show up in the HDL code?

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  • Former Member
    0 Former Member over 10 years ago

    This tutorial helped me a lot! http://www.dissertationavenue.co.uk/ peripheral that may be relocatable via PPS may only be relocatable to a specific 8 of 19 available RP pins based on what group the peripheral falls in.

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