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How to change dtsi(eg:maaxboard-extended-gpio.dtsi)  to make M41T93 spi rtc work in maaxboard yocto zeus branch?

gonewtinwind

Hi Josh,

I use maaxboard board (not mini, not nano)

the M41T93 spi rtc works well in kernel 4.14(yocto sumo branch) , I showed here before: Enable the SPI port on MaaxBoard?

but

I need to add M41T93 spi rtc chip in yocto zeus branch(kernel 5.4),but I find the maaxboard-extended-gpio.dtsi  is different with maaxboard-nano-extended-gpio.dtsi.

the maaxboard-extended-gpio.dtsi file still keeps the gpio for  old settings , I thought the zeus did not support maaxboard now, so I need to modify it similar to  maaxboard-nano-extended-gpio.dtsi.

so I change the ecspi part as the below  patch file(see attached file,001-spi-real-time-M41T93.patch, I change kernel config,I can find the /dev/rtc0, I removed snvs_rtc),but unfortunately the spi rtc still not work!

How to change the dtsi in kerenel 5.4? I think maaxboard nano work well, I just follow it to modify maaxboard .dtsi file  similiarly . the spi rtc should work.

Thank you very much.

 

 

my full patch file:

 

diff -Naur ori/arch/arm64/boot/dts/freescale/imx8mq.dtsi patches/arch/arm64/boot/dts/freescale/imx8mq.dtsi

--- ori/arch/arm64/boot/dts/freescale/imx8mq.dtsi       2021-04-15 12:55:28.039009295 -0400

+++ patches/arch/arm64/boot/dts/freescale/imx8mq.dtsi   2021-04-15 16:33:48.243133485 -0400

@@ -591,15 +591,6 @@

                                compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";

                                reg = <0x30370000 0x10000>;

 

-                               snvs_rtc: snvs-rtc-lp{

-                                       compatible = "fsl,sec-v4.0-mon-rtc-lp";

-                                       regmap =<&snvs>;

-                                       offset = <0x34>;

-                                       interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,

-                                               <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;

-                                       clocks = <&clk IMX8MQ_CLK_SNVS_ROOT>;

-                                       clock-names = "snvs-rtc";

-                               };

 

                                snvs_pwrkey: snvs-powerkey {

                                        compatible = "fsl,sec-v4.0-pwrkey";

@@ -832,7 +823,7 @@

                                clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,

                                         <&clk IMX8MQ_CLK_ECSPI1_ROOT>;

                                clock-names = "ipg", "per";

-                               status = "disabled";

+                               status = "enabled";

                        };

 

                        ecspi2: spi@30830000 {

diff -Naur ori/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi patches/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi

--- ori/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi      2021-04-08 14:58:09.820015901 -0400

+++ patches/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi  2021-04-19 13:57:18.993139208 -0400

@@ -37,10 +37,15 @@

 

                pinctrl_ecspi1: ecspi1grp {

                                fsl,pins = <

-                               MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9               0x16

-                               MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI    0x16

-                               MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO    0x16

-                               MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK    0x1816

+                               MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI    0x82

+                               MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO    0x82

+                               MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK    0x82

+                       >;

+               };

+

+               pinctrl_ecspi1_cs: ecspi1cs {

+                       fsl,pins = <

+                               MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9               0x40000

                        >;

                };

 

@@ -90,10 +95,19 @@

 

&ecspi1{

        fsl,spi-num-chipselects = < 1 >;

-       cs-gpios = <&gpio5 13 0 > ;

+       cs-gpios = <&gpio5 9 0 > ;

        pinctrl-names = "default";

-       pinctrl-0 = <&pinctrl_ecspi1 >;

+       pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;

        status = "okay";

+       #address-cells=<1>;

+       #size-cells=<0>;

+       rtc@0x00{

+       #address-cellss=<1>;

+       #size-cells=<1>;

+       compatible = "rtc-m41t93";

+       spi-max-frequency = <5000000>;

+       reg = <0>;

+    };

};

 

&i2c2 {

                                                                                                                                                                                                                          73,1          Bot

Attachments:
001-spi-real-time-M41T93.txt.zip
Parents

  • Hi Joshua,

     

    your updated patch works well!

    Thank you sooo much.

    please see the following files for people who need:

     

     

    diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi

    index 5943d2ed653d..239271911429 100755

    --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi

    +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi

    @@ -826,7 +826,7 @@

      ecspi1: spi@30820000 {

      #address-cells = <1>;

      #size-cells = <0>;

    - compatible = "fsl,imx8mq-ecspi", "fsl,imx6ul-ecspi";

    + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";

      reg = <0x30820000 0x10000>;

      interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,

    @@ -838,7 +838,7 @@

      ecspi2: spi@30830000 {

      #address-cells = <1>;

      #size-cells = <0>;

    - compatible = "fsl,imx8mq-ecspi", "fsl,imx6ul-ecspi";

    + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";

      reg = <0x30830000 0x10000>;

      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,

    @@ -850,7 +850,7 @@

      ecspi3: spi@30840000 {

      #address-cells = <1>;

      #size-cells = <0>;

    - compatible = "fsl,imx8mq-ecspi", "fsl,imx6ul-ecspi";

    + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";

      reg = <0x30840000 0x10000>;

      interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,

    diff --git a/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi b/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi

    index 25c84d58bf74..61202110b358 100755

    --- a/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi

    +++ b/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi

    @@ -37,10 +37,10 @@

     

      pinctrl_ecspi1: ecspi1grp {

      fsl,pins = <

    - MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x16

    - MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x16

    - MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x16

    - MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x1816

    + MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19

    + MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x19

    + MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x19

    + MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x19

      >;

      };

     

    @@ -89,11 +89,23 @@

    };

     

    &ecspi1{

    - fsl,spi-num-chipselects = < 1 >;

    - cs-gpios = <&gpio5 13 0 > ;

      pinctrl-names = "default";

    - pinctrl-0 = <&pinctrl_ecspi1 >;

    + pinctrl-0 = <&pinctrl_ecspi1>;

    + fsl,spi-num-chipselects = <1>;

    + cs-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;

      status = "okay";

    + #address-cells = <1>;

    + #size-cells = <0>;

    +

    + rtc@0 {

    + compatible = "rtc-m41t93";

    + reg = <0>;

    + spi-max-frequency = <2000000>;

    + };

    +};

    +

    +&snvs_rtc {

    + status = "disabled";

    };

     

    &i2c2 {

    diff --git a/arch/arm64/configs/maaxboard_defconfig b/arch/arm64/configs/maaxboard_defconfig

    index a89ebacf02f7..0a796e196774 100755

    --- a/arch/arm64/configs/maaxboard_defconfig

    +++ b/arch/arm64/configs/maaxboard_defconfig

    @@ -659,6 +659,7 @@ CONFIG_EDAC=y

    CONFIG_EDAC_GHES=y

    CONFIG_EDAC_SYNOPSYS=y

    CONFIG_RTC_CLASS=y

    +CONFIG_RTC_DRV_M41T93=y

    CONFIG_RTC_DRV_DS1307=y

    CONFIG_RTC_DRV_MAX77686=y

    CONFIG_RTC_DRV_RK808=m

    diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c

    index 09ae4282ad56..a145004f649b 100644

    --- a/drivers/dma/imx-sdma.c

    +++ b/drivers/dma/imx-sdma.c

    @@ -639,7 +639,6 @@ static struct sdma_driver_data sdma_imx8mq = {

      .num_events = 48,

      .script_addrs = &sdma_script_imx7d,

      .check_ratio = 1,

    - .ecspi_fixed = true,

    };

     

    static struct sdma_driver_data sdma_imx8mp = {

    diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c

    index 39870bc38e40..f608f89f45cd 100644

    --- a/drivers/spi/spi-fsl-lpspi.c

    +++ b/drivers/spi/spi-fsl-lpspi.c

    @@ -888,12 +888,6 @@ static int fsl_lpspi_probe(struct platform_device *pdev)

      controller->bus_num = pdev->id;

      controller->slave_abort = fsl_lpspi_slave_abort;

     

    - ret = devm_spi_register_controller(&pdev->dev, controller);

    - if (ret < 0) {

    - dev_err(&pdev->dev, "spi_register_controller error.\n");

    - goto out_controller_put;

    - }

    -

      if (!fsl_lpspi->is_slave) {

      controller->cs_gpios = devm_kzalloc(&controller->dev,

      sizeof(int) * controller->num_chipselect, GFP_KERNEL);

    @@ -901,6 +895,11 @@ static int fsl_lpspi_probe(struct platform_device *pdev)

      for (i = 0; i < controller->num_chipselect; i++) {

      int cs_gpio = of_get_named_gpio(np, "cs-gpios", i);

     

    + if (cs_gpio == -EPROBE_DEFER) {

    + ret = -EPROBE_DEFER;

    + goto out_controller_put;

    + }

    +

      if (!gpio_is_valid(cs_gpio) && lpspi_platform_info)

      cs_gpio = lpspi_platform_info->chipselect[i];

     

    @@ -971,13 +970,30 @@ static int fsl_lpspi_probe(struct platform_device *pdev)

     

      ret = fsl_lpspi_dma_init(&pdev->dev, fsl_lpspi, controller);

      if (ret == -EPROBE_DEFER)

    - goto out_controller_put;

    -

    + goto err_disable_runtime_pm;

      if (ret < 0)

      dev_err(&pdev->dev, "dma setup error %d, use pio\n", ret);

    + else

    + /* disable LPSPI module IRQ when enable DMA mode successfully,

    + * to prevent the unexpected LPSPI module IRQ events*/

    + disable_irq(irq);

    +

    + ret = devm_spi_register_controller(&pdev->dev, controller);

    + if (ret < 0) {

    + dev_err(&pdev->dev, "spi_register_controller error.\n");

    + goto err_disable_runtime_pm;

    + }

    +

    + pm_runtime_mark_last_busy(fsl_lpspi->dev);

    + pm_runtime_put_autosuspend(fsl_lpspi->dev);

     

      return 0;

     

    +err_disable_runtime_pm:

    + pm_runtime_dont_use_autosuspend(fsl_lpspi->dev);

    + pm_runtime_put_sync(fsl_lpspi->dev);

    + pm_runtime_disable(fsl_lpspi->dev);

    +

    out_controller_put:

      spi_controller_put(controller);

     

    diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c

    index 91e32291c44e..0128e33eb5bc 100644

    --- a/drivers/spi/spi-imx.c

    +++ b/drivers/spi/spi-imx.c

    @@ -1775,8 +1775,13 @@ static int spi_imx_probe(struct platform_device *pdev)

      /* Request GPIO CS lines, if any */

      if (!spi_imx->slave_mode && master->cs_gpios) {

      for (i = 0; i < master->num_chipselect; i++) {

    - if (!gpio_is_valid(master->cs_gpios[i]))

    + if (!gpio_is_valid(master->cs_gpios[i])) {

    + if (master->cs_gpios[i] == -EPROBE_DEFER) {

    + ret = -EPROBE_DEFER;

    + goto out_spi_bitbang;

    + }

      continue;

    + }

     

      ret = devm_gpio_request(&pdev->dev,

      master->cs_gpios[i],

Reply

  • Hi Joshua,

     

    your updated patch works well!

    Thank you sooo much.

    please see the following files for people who need:

     

     

    diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi

    index 5943d2ed653d..239271911429 100755

    --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi

    +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi

    @@ -826,7 +826,7 @@

      ecspi1: spi@30820000 {

      #address-cells = <1>;

      #size-cells = <0>;

    - compatible = "fsl,imx8mq-ecspi", "fsl,imx6ul-ecspi";

    + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";

      reg = <0x30820000 0x10000>;

      interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&clk IMX8MQ_CLK_ECSPI1_ROOT>,

    @@ -838,7 +838,7 @@

      ecspi2: spi@30830000 {

      #address-cells = <1>;

      #size-cells = <0>;

    - compatible = "fsl,imx8mq-ecspi", "fsl,imx6ul-ecspi";

    + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";

      reg = <0x30830000 0x10000>;

      interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&clk IMX8MQ_CLK_ECSPI2_ROOT>,

    @@ -850,7 +850,7 @@

      ecspi3: spi@30840000 {

      #address-cells = <1>;

      #size-cells = <0>;

    - compatible = "fsl,imx8mq-ecspi", "fsl,imx6ul-ecspi";

    + compatible = "fsl,imx8mq-ecspi", "fsl,imx51-ecspi";

      reg = <0x30840000 0x10000>;

      interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;

      clocks = <&clk IMX8MQ_CLK_ECSPI3_ROOT>,

    diff --git a/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi b/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi

    index 25c84d58bf74..61202110b358 100755

    --- a/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi

    +++ b/arch/arm64/boot/dts/freescale/maaxboard-extended-gpio.dtsi

    @@ -37,10 +37,10 @@

     

      pinctrl_ecspi1: ecspi1grp {

      fsl,pins = <

    - MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x16

    - MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x16

    - MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x16

    - MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x1816

    + MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19

    + MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x19

    + MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x19

    + MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x19

      >;

      };

     

    @@ -89,11 +89,23 @@

    };

     

    &ecspi1{

    - fsl,spi-num-chipselects = < 1 >;

    - cs-gpios = <&gpio5 13 0 > ;

      pinctrl-names = "default";

    - pinctrl-0 = <&pinctrl_ecspi1 >;

    + pinctrl-0 = <&pinctrl_ecspi1>;

    + fsl,spi-num-chipselects = <1>;

    + cs-gpios = <&gpio5 9 GPIO_ACTIVE_HIGH>;

      status = "okay";

    + #address-cells = <1>;

    + #size-cells = <0>;

    +

    + rtc@0 {

    + compatible = "rtc-m41t93";

    + reg = <0>;

    + spi-max-frequency = <2000000>;

    + };

    +};

    +

    +&snvs_rtc {

    + status = "disabled";

    };

     

    &i2c2 {

    diff --git a/arch/arm64/configs/maaxboard_defconfig b/arch/arm64/configs/maaxboard_defconfig

    index a89ebacf02f7..0a796e196774 100755

    --- a/arch/arm64/configs/maaxboard_defconfig

    +++ b/arch/arm64/configs/maaxboard_defconfig

    @@ -659,6 +659,7 @@ CONFIG_EDAC=y

    CONFIG_EDAC_GHES=y

    CONFIG_EDAC_SYNOPSYS=y

    CONFIG_RTC_CLASS=y

    +CONFIG_RTC_DRV_M41T93=y

    CONFIG_RTC_DRV_DS1307=y

    CONFIG_RTC_DRV_MAX77686=y

    CONFIG_RTC_DRV_RK808=m

    diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c

    index 09ae4282ad56..a145004f649b 100644

    --- a/drivers/dma/imx-sdma.c

    +++ b/drivers/dma/imx-sdma.c

    @@ -639,7 +639,6 @@ static struct sdma_driver_data sdma_imx8mq = {

      .num_events = 48,

      .script_addrs = &sdma_script_imx7d,

      .check_ratio = 1,

    - .ecspi_fixed = true,

    };

     

    static struct sdma_driver_data sdma_imx8mp = {

    diff --git a/drivers/spi/spi-fsl-lpspi.c b/drivers/spi/spi-fsl-lpspi.c

    index 39870bc38e40..f608f89f45cd 100644

    --- a/drivers/spi/spi-fsl-lpspi.c

    +++ b/drivers/spi/spi-fsl-lpspi.c

    @@ -888,12 +888,6 @@ static int fsl_lpspi_probe(struct platform_device *pdev)

      controller->bus_num = pdev->id;

      controller->slave_abort = fsl_lpspi_slave_abort;

     

    - ret = devm_spi_register_controller(&pdev->dev, controller);

    - if (ret < 0) {

    - dev_err(&pdev->dev, "spi_register_controller error.\n");

    - goto out_controller_put;

    - }

    -

      if (!fsl_lpspi->is_slave) {

      controller->cs_gpios = devm_kzalloc(&controller->dev,

      sizeof(int) * controller->num_chipselect, GFP_KERNEL);

    @@ -901,6 +895,11 @@ static int fsl_lpspi_probe(struct platform_device *pdev)

      for (i = 0; i < controller->num_chipselect; i++) {

      int cs_gpio = of_get_named_gpio(np, "cs-gpios", i);

     

    + if (cs_gpio == -EPROBE_DEFER) {

    + ret = -EPROBE_DEFER;

    + goto out_controller_put;

    + }

    +

      if (!gpio_is_valid(cs_gpio) && lpspi_platform_info)

      cs_gpio = lpspi_platform_info->chipselect[i];

     

    @@ -971,13 +970,30 @@ static int fsl_lpspi_probe(struct platform_device *pdev)

     

      ret = fsl_lpspi_dma_init(&pdev->dev, fsl_lpspi, controller);

      if (ret == -EPROBE_DEFER)

    - goto out_controller_put;

    -

    + goto err_disable_runtime_pm;

      if (ret < 0)

      dev_err(&pdev->dev, "dma setup error %d, use pio\n", ret);

    + else

    + /* disable LPSPI module IRQ when enable DMA mode successfully,

    + * to prevent the unexpected LPSPI module IRQ events*/

    + disable_irq(irq);

    +

    + ret = devm_spi_register_controller(&pdev->dev, controller);

    + if (ret < 0) {

    + dev_err(&pdev->dev, "spi_register_controller error.\n");

    + goto err_disable_runtime_pm;

    + }

    +

    + pm_runtime_mark_last_busy(fsl_lpspi->dev);

    + pm_runtime_put_autosuspend(fsl_lpspi->dev);

     

      return 0;

     

    +err_disable_runtime_pm:

    + pm_runtime_dont_use_autosuspend(fsl_lpspi->dev);

    + pm_runtime_put_sync(fsl_lpspi->dev);

    + pm_runtime_disable(fsl_lpspi->dev);

    +

    out_controller_put:

      spi_controller_put(controller);

     

    diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c

    index 91e32291c44e..0128e33eb5bc 100644

    --- a/drivers/spi/spi-imx.c

    +++ b/drivers/spi/spi-imx.c

    @@ -1775,8 +1775,13 @@ static int spi_imx_probe(struct platform_device *pdev)

      /* Request GPIO CS lines, if any */

      if (!spi_imx->slave_mode && master->cs_gpios) {

      for (i = 0; i < master->num_chipselect; i++) {

    - if (!gpio_is_valid(master->cs_gpios[i]))

    + if (!gpio_is_valid(master->cs_gpios[i])) {

    + if (master->cs_gpios[i] == -EPROBE_DEFER) {

    + ret = -EPROBE_DEFER;

    + goto out_spi_bitbang;

    + }

      continue;

    + }

     

      ret = devm_gpio_request(&pdev->dev,

      master->cs_gpios[i],

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