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Reading BeagleBone AI Temperatures

gdstew

I finally brought up my BeagleBone AI with a 25mm x 7mm fan firmly screwed into the heat sink using M2 or

M3 (they were salvaged so I don't know for sure) machine screws. It was a lot quieter than I was expecting

although I don't believe it is running at the advertised 10K RPM. Attempting to update the software with

apt-get upgrade (after doing apt-get update) died with the message "FATAL -> failed to fork" which turned out

to be a low memory problem. The Getting Started program from the desktop was running the cloud9 IDE in

the Chromium browser so I shut that down and did the upgrade again and it worked. I had no problems with

any of the other updates after that.

 

The next thing I did was go look for where the SoC temperatures could be read and I think I found them several

sub-directories deep in the /sys directory. I do wish that there was a standard directory to put these in as

everybody puts them in very different places in the /sys directory. There are 5 different thermal zones and

each one has a directory in the /sys/devices/virtual/thermal/ directory named thermal_zone0 -  thermal_zone4.

To display the temperature for thermal zone 0 use this command:

 

debian@beaglebone:~$ cat /sys/devices/virtual/thermal/thermal_zone0/temp

47000

debian@beaglebone:~$

 

The response, 47000 (your mileages WILL vary) is 47.0 deg. C.

 

At the time the AI was mostly idle with me on a terminal inside an LXDE window. The temperatures I was

reading were within a couple of degrees C across all the zones. There are many thermal management

configuration files in the thermal_zoneX directories and it would be great to get documentation on what/where

the thermal zones are as well as the thermal management settings used for them.

 

While the idle temperatures were OK for checking out and doing light work on the AI I'm going to have to

come up with some serious thermal solutions. A 40mm fan is the biggest you can get between the GPIO

headers and I don't know if that will be big enough when you start loading up several of the more interesting

cores.

Parents

  • The pre-attached heat sink has M3 holes spaced 20x20 mm.

    The height of the heat sink clears the USB type A socket, and all other components on the board except the 46-way header sockets and the Ethernet socket.

  • in reply to mfetting

    You also need enough room between the fan and any cape above it to allow the air to flow as freely as possible for more efficent cooling and to keep the load on the fan motor as low as possible.

    I've wondered how many existing capes have header pins long enough to properly clear the fan and allow them to be used on the AI. As I said in another post, I understand why the wanted to

    keep the BeagleBone form factor, but due to the thermal  problems everybody is seeing I think that it was a mistake. One possible way of getting around that would have been to put the GPIO

    headers on the bottom of the board instead of the top. You could still use existing capes by using headers with male pins on both sides to connect between them and leave the top of the AI free

    for a larger heat sink/fan. I have a Snickerdoodle Xilinx FPGA board that had this as a build option. It also had an option for a tall copper heat sink for the FPGA. Mine has both.

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  • in reply to mfetting

    You also need enough room between the fan and any cape above it to allow the air to flow as freely as possible for more efficent cooling and to keep the load on the fan motor as low as possible.

    I've wondered how many existing capes have header pins long enough to properly clear the fan and allow them to be used on the AI. As I said in another post, I understand why the wanted to

    keep the BeagleBone form factor, but due to the thermal  problems everybody is seeing I think that it was a mistake. One possible way of getting around that would have been to put the GPIO

    headers on the bottom of the board instead of the top. You could still use existing capes by using headers with male pins on both sides to connect between them and leave the top of the AI free

    for a larger heat sink/fan. I have a Snickerdoodle Xilinx FPGA board that had this as a build option. It also had an option for a tall copper heat sink for the FPGA. Mine has both.

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