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| Kit Overview | Development Tools | Technical Documents | Video | Features | Kit Contents |
Overview
The Altera's P0037 DE0 Development and Education board is designed in a compact size with all the essential tools for novice users to gain knowledge in areas of digital logic, computer organization and FPGAs. It is equipped with Altera Cyclone III 3C16 FPGA device, which offers 15,408 LEs. The board provides 346 user I/O pins, and is loaded with a rich set of features that makes it suitable to be used for advanced university and college courses, as well as the development of sophisticated digital systems.
The DE0 combines the Altera low-power, low-cost, and high performance Cyclone III FPGA to control the various features of the DE0 Board. The DE0 Development Board includes software, reference designs, and accessories required to ensure the user simple access in evaluating their DE0 Board. The Cyclone
III FPGA family offers an unprecedented combination of low power, high functionality, and low cost to maximize your competitive edge. The features and architecture of the Cyclone III FPGA provide the ideal solution for your high-volume, low-power, cost-sensitive applications.
With densities ranging from about 5,000 to 200,000 logic elements (LEs) and 0.5 Megabits (Mb) to 8 Mb of memory for less than ¼ watt of static power consumption, Cyclone III device family makes it easier for you to meet your power budget. Cyclone III LS FPGAs are the first to offer a suite of security features at the silicon, software, and intellectual property (IP) level on a low power, high functionality FPGA. This suite of security features protects your IP from tampering, reverse engineering, and cloning. Additionally, these devices enable you to introduce redundancy in a single chip using design separation, which reduces the size, weight, and power of your applications.
Key Applications: Automotive, Consumer, Display, Industrial, Military, Video and image processing, Wireless.
Development Tools
Software Development Tools:
| Tool Type | Supplier | Supported Family | MPN | Description |
|---|---|---|---|---|
| IDE | Altera | ALL Altera Devices | Altera Quartus II | It's the industry's number one software in performance and productivity for CPLD, FPGA, and HardCopy ASIC designs. The Altera Quartus II software, the industry's number one software in performance and productivity for CPLD, FPGA, and HardCopy ASIC designs. Learn More |
Hardware Development Tools:
| Tool Type | Supplier | Support?ed Family | MPN | Description |
|---|---|---|---|---|
| Download Cable | Altera | ALL Altera Devices | PL-BYTEBLASTER2NPL-BYTEBLASTER2N | The ByteBlaster II enables a PC to configure or program Altera devices. The download cable drives configuration or programming data using a standard parallel printer port from the PC. |
| Download Cable | Altera | ALL Altera Devices | PL-USB-BLASTER-RCNPL-USB-BLASTER-RCN | The USB-Blaster drives configuration or programming data from the PC to configure or program Altera devices. The download cable interfaces to a standard USB PC port. |
| Download Cable | Altera | ALL Altera Devices | PL-ETH2-BLASTERPL-ETH2-BLASTER | The EthernetBlaster can receive configuration or programming data from the Ethernet network to remotely configure or program Altera devices. The communications cable connects to a standard Ethernet network port with an RJ-45 connector. |
Technical Documents
Learning Center
| Type | Description |
|---|---|
| User Manual | Altera: User Manual for DE0-Nano board |
Design Elements
| Type | Description |
|---|---|
Video
| Video1 | Video2 |
|---|---|
Kit Features
The Altera's P0037 DE0 Board features the following:
- FPGA
- Cyclone III EP3C16F484EP3C16F484 FPGA
- 15,408 LEs
- 56 M9K Embedded Memory Blocks
- 504K total RAM bits
- 56 embedded multipliers
- 4 PLLs
- 346 user I/O pins
- FineLine BGA 484-pin package
- Cyclone III EP3C16F484EP3C16F484 FPGA
- Memory
- SDRAM
- One 8-Mbyte Single Data Rate Synchronous Dynamic RAM memory chip
- Flash memory
- 4-Mbyte NOR Flash memory
- Support Byte (8-bits)/Word (16-bits) mode
- SD card socket
- Provides both SPI and SD 1-bit mode SD Card access
- SDRAM
- Interface
- Built-in USB Blaster circuit
- On-board USB Blaster for programming
- Using the Altera EPM240 EPM240 CPLD
- Altera Serial Configuration device
- Altera EPCS4 EPCS4 serial EEPROM chip
- Pushbutton switches
- 3 pushbutton switches
- Slide switches
- 10 Slide switches
- General User Interfaces
- 10 Green color LEDs
- 4 seven-segment displays
- 16x2 LCD Interface (Not include LCD module)
- Clock inputs
- 50-MHz oscillator
- VGA output
- Uses a 4-bit resistor-network DAC
- With 15-pin high-density D-sub connector
- Supports up to 1280x1024 at 60-Hz refresh rate
- Serial ports
- One RS-232 port (Without DB-9 serial connector)
- One PS/2 port (Can be used through a PS/2 Y Cable to allow you to connect a keyboard and mouse to one port)
- Two 40-pin expansion headers
- 72 Cyclone III I/O pins, as well as 8 power and ground lines, are brought out to two 40-pin expansion connectors
- 40-pin header is designed to accept a standard 40-pin ribbon cable used for IDE hard drives
- Built-in USB Blaster circuit
Kit Contents
The Altera's P0037 DE0 Board supplied with below contents:
- Altera DE0 Board
- USB Cable for FPGA programming and control
- DE0 System CD containing :
- Altera’s Quartus II Web Edition and the Nios II Embedded Design Suit Evaluation Edition software
- The DE0 documentation and supporting materials, including the User Manual, the Control Panel utility, reference designs and demonstrations, device datasheets, tutorials, and a set of laboratory exercises
- Altera’s Quartus
- DE0 Acrylic
- Adapter DC 7.5V/0.8A (US wall plug)
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