>>>>> "Richard" == Richard Hammerl <ric@cadsoft.de> writes:
Richard> Am 12.03.2011 16:33, schrieb Marc D Ronell:
>>
>>>>>>> "Richard" == Richard Hammerl <ric@cadsoft.de> writes:
>>
Richard> Am 10.03.2011 07:37, schrieb Morten Leikvoll:
>> >> Marc D Ronell <mronell@alumni.upenn.edu> wrote:
>> >>> How do I create a stencil file which does not contain vias?
>> I >>> have an Eagle Cad board design. I would like to process
>> a cam >>> file to generate an output stencil file.
>> >>
>> >> There is a drc setting for a via diameter limit wich masks
>> vias >> below the chosen diameter.
>>
Richard> Just as addendum: The limit value refers to the drill
Richard> diameter of the via.
>>
>> If I run the gerb274x.cam job and Add a job (tab) with just the
>> Pads layer (17) and the tCream layer (31), I get a result which
>> looks reasonable in gerbv for a potential stencil. Does that
>> approach seem reasonable? Or does it miss something that I am
>> not aware of yet?
>>
>> Thanks,
>>
>> Marc
>>
>>
Richard> For creating a Geber file for the solder paste mask on
Richard> the top side you have to activate layer 31 in the CAM
Richard> processor, nothing else.
Thanks for the helpful postings. I was just new at this. I had
everything working properly, but I was expecting stencil output on
library parts which were not designed to produce surface mount
technology output.
Operator error on my part, just part of the learning experience.
Thanks for the help and feedback.
marc
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