On 1/6/2012 3:21 PM, alah wrote:
Hi, everybody. I drew my schematic and built my board. It LOOKs very fine even on a print but when I run DRC I get CLEARENCE and OVERLAP errors; WHY?
Oops, now another question; Why can´t we attatch eagle files? Thanks, Alberto.
The clearance errors are determined by what is set in the drc settings
clearance tab. Either it set set too small or traces are too close together.
Overlap is exactly that, two nets are touching. This can happen on some
homemade library parts with unconnected copper (custom pad shape, etc
)on the pads. Double click on the errors on the box and it should become
clear what is happening.
