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EAGLE User Chat (English) 6.1.5, DRC err on tStop layer...sometimes
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6.1.5, DRC err on tStop layer...sometimes

e14 Contributor
e14 Contributor over 14 years ago

Hi,

 

Most likely my error someplace, brand new to Eagle CAD. Anyway, my

question is: Is tStop layer invisible by default? Reason for this

question: I was down to zero DRC errors on my first small board layout

with Eagle, then I notice part of the perimeter (layer 20) had vanished

on my layout. So, I turned off view of all layers, then turned on just

layer 20 so I could redraw the border outline. Fine, done with that,

turn on ALL layers and ran DRC. Now have about 30 errors re tStop layer.

How is it possible to not see this before? Just for fun, I turned off

tStop layer and ran DRC again. No errors! What the heck... can anyone

shed some light on this, is there something I need to fix? By the way, I

did 99% of this layout with original default design rules, then found

that SunStone had a .DRU file for Eagle, so I loaded that. Still did not

see errors before turning on ALL layers. Should I be concerned about

these errors I almost did not notice before ordering boards? I made

Gerber files & looked at them with GerbV, they look fine to my

eyeball...but i don't perceive 3mil objects all that well! That seems to

be the top solder mask min/max in the SunStone rules.

 

Thanks for any enlightenment,

Bill

 

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  • e14 Contributor
    e14 Contributor over 14 years ago

    On 4/13/2012 11:31 AM, Robert Scott wrote:

    On Thu, 12 Apr 2012 20:51:25 -0700, Bill Martin<wwm@wwmartin.net>

    wrote:

     

    >> Hi,

    >>

    >> Most likely my error someplace, brand new to Eagle CAD. Anyway, my

    >> question is: Is tStop layer invisible by default? Reason for this

    >> question: I was down to zero DRC errors on my first small board layout

    >> with Eagle, then I notice part of the perimeter (layer 20) had vanished

    >> on my layout. So, I turned off view of all layers, then turned on just

    >> layer 20 so I could redraw the border outline. Fine, done with that,

    >> turn on ALL layers and ran DRC. Now have about 30 errors re tStop layer.

    >> How is it possible to not see this before? Just for fun, I turned off

    >> tStop layer and ran DRC again. No errors! What the heck... can anyone

    >> shed some light on this, is there something I need to fix? By the way, I

    >> did 99% of this layout with original default design rules, then found

    >> that SunStone had a .DRU file for Eagle, so I loaded that. Still did not

    >> see errors before turning on ALL layers. Should I be concerned about

    >> these errors I almost did not notice before ordering boards? I made

    >> Gerber files&  looked at them with GerbV, they look fine to my

    >> eyeball...but i don't perceive 3mil objects all that well! That seems to

    >> be the top solder mask min/max in the SunStone rules.

     

    I just posted a similar issue in the support forum and got the same

    answer as you got from Joern.  DRC only checks visible layers.  I also

    got lots of tStop errors when I temporarily turned on tStop (29)

    visibility.  It turned out that all those errors were for the

    silkscreen layer overlapping the stop mask.  However even those errors

    seemed to be calculated on unrealistic rules.  It seems that a

    conflict is detected when any part of the silkscreen text rectangle

    intersects with any part of the stop mask, even if no part of the

    actual silkscreen text is anywhere near the stop mask.  I suppose it

    is just very difficult for Eagle to check the rendering of each letter

    in the text to see if it overlaps with the stop mask.  It is much

    easier to just check the rectangle that contains the text.  In most

    cases you can just approve such errors and go on.  But imagine what

    would happen if some silkscreen were placed squarely on top of a

    surface-mount pad.  It would make that pad unsolderable.  So we

    certainly want an error to be declared in that case.

     

    Robert Scott

    Ypsilanti, Michigan

     

     

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  • e14 Contributor
    e14 Contributor over 14 years ago

    On 4/13/2012 11:31 AM, Robert Scott wrote:

    On Thu, 12 Apr 2012 20:51:25 -0700, Bill Martin<wwm@wwmartin.net>

    wrote:

     

    >> Hi,

    >>

    >> Most likely my error someplace, brand new to Eagle CAD. Anyway, my

    >> question is: Is tStop layer invisible by default? Reason for this

    >> question: I was down to zero DRC errors on my first small board layout

    >> with Eagle, then I notice part of the perimeter (layer 20) had vanished

    >> on my layout. So, I turned off view of all layers, then turned on just

    >> layer 20 so I could redraw the border outline. Fine, done with that,

    >> turn on ALL layers and ran DRC. Now have about 30 errors re tStop layer.

    >> How is it possible to not see this before? Just for fun, I turned off

    >> tStop layer and ran DRC again. No errors! What the heck... can anyone

    >> shed some light on this, is there something I need to fix? By the way, I

    >> did 99% of this layout with original default design rules, then found

    >> that SunStone had a .DRU file for Eagle, so I loaded that. Still did not

    >> see errors before turning on ALL layers. Should I be concerned about

    >> these errors I almost did not notice before ordering boards? I made

    >> Gerber files&  looked at them with GerbV, they look fine to my

    >> eyeball...but i don't perceive 3mil objects all that well! That seems to

    >> be the top solder mask min/max in the SunStone rules.

     

    I just posted a similar issue in the support forum and got the same

    answer as you got from Joern.  DRC only checks visible layers.  I also

    got lots of tStop errors when I temporarily turned on tStop (29)

    visibility.  It turned out that all those errors were for the

    silkscreen layer overlapping the stop mask.  However even those errors

    seemed to be calculated on unrealistic rules.  It seems that a

    conflict is detected when any part of the silkscreen text rectangle

    intersects with any part of the stop mask, even if no part of the

    actual silkscreen text is anywhere near the stop mask.  I suppose it

    is just very difficult for Eagle to check the rendering of each letter

    in the text to see if it overlaps with the stop mask.  It is much

    easier to just check the rectangle that contains the text.  In most

    cases you can just approve such errors and go on.  But imagine what

    would happen if some silkscreen were placed squarely on top of a

    surface-mount pad.  It would make that pad unsolderable.  So we

    certainly want an error to be declared in that case.

     

    Robert Scott

    Ypsilanti, Michigan

     

     

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