Copper Pours - Manufacturability of PCB

Paul Romanyszyn wrote:

John M. Jarvis wrote:

Hi -

 

I've got a PCB with a fair number of sensitive analog parts on it so

I've flooded a large area of the top layer of the board with a copper

ground plane using the Polygon feature of Eagle.  Another large

section of the board has been left without the top layer copper

plane.  All is OK with this and the PCB is about ready to manufacture.

 

It occurred to me that this could be problematic in the PCB

manufacturing process.  Having half the board covered with copper

where the traces are isolated by a narrow gap and then the other half

with narrow traces and all the surrounding copper removed could

present problems for the etching process.

 

This should not affect the etching process. Large copper areas in some

areas may affect the board and make it warp when you solder it by wave

or reflow methods. I think with proper preheating it won't be a problem.

 

On the other hand, removing less copper by leaving large copper pours

should be more environmentally friendly.

 

I fill both the top and bottom with ground and power polygons

 

Filled with ground highlighted.

http://arcelectronicsinc.com/testinfo/componentside.png

 

Filled with +5 highlighted

http://arcelectronicsinc.com/testinfo/plus5.png

Do PCB manufacturers have a preference one way or the other?  (I've

checked a number of PCB vendors websites and haven't really found any

information.)

 

Sincerely,

 

John

 

 

 

 

Paul R.

You can check with the PCB manufacture to see if they can add thieving

to the areas void of copper. This could help with preventing board

warpage and overetching of the areas with large amounts of copper.

Paul Romanyszyn wrote:

John M. Jarvis wrote:

Hi -

 

I've got a PCB with a fair number of sensitive analog parts on it so

I've flooded a large area of the top layer of the board with a copper

ground plane using the Polygon feature of Eagle.  Another large

section of the board has been left without the top layer copper

plane.  All is OK with this and the PCB is about ready to manufacture.

 

It occurred to me that this could be problematic in the PCB

manufacturing process.  Having half the board covered with copper

where the traces are isolated by a narrow gap and then the other half

with narrow traces and all the surrounding copper removed could

present problems for the etching process.

 

This should not affect the etching process. Large copper areas in some

areas may affect the board and make it warp when you solder it by wave

or reflow methods. I think with proper preheating it won't be a problem.

 

On the other hand, removing less copper by leaving large copper pours

should be more environmentally friendly.

 

I fill both the top and bottom with ground and power polygons

 

Filled with ground highlighted.

http://arcelectronicsinc.com/testinfo/componentside.png

 

Filled with +5 highlighted

http://arcelectronicsinc.com/testinfo/plus5.png

Do PCB manufacturers have a preference one way or the other?  (I've

checked a number of PCB vendors websites and haven't really found any

information.)

 

Sincerely,

 

John

 

 

 

 

Paul R.

You can check with the PCB manufacture to see if they can add thieving

to the areas void of copper. This could help with preventing board

warpage and overetching of the areas with large amounts of copper.