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Autodesk EAGLE
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Autodesk EAGLE
EAGLE User Chat (English) Eagle Board layout question from newbie
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  • Replies 5 replies
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  • tstop
Related

Eagle Board layout question from newbie

Former Member
Former Member over 11 years ago

Hello,

 

When i add a package to my board layout, i got tStop thingies (donno what they are)

that do not move with the package

i can't even select them

 

how could i delete these ?

 

thx

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  • autodeskguest
    autodeskguest over 11 years ago

    Hi Rompel,

     

    These are error polygons from the DRC. They can be removed by running

    the DRC and then clicking "Clear All" in the errors dialog that pops up.

     

    Let me know if there's anything else I can do for you.

     

    Best Regards,

    Jorge Garcia

     

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  • Former Member
    Former Member over 11 years ago in reply to autodeskguest

    ok thanks mate

     

    but now i got another problem, "More than one output pin on net..."

     

    i use 2 x 4067 multiplexers having their output either setup as a regular output or being set as high impedance output

    so both outputs are linked to the same connector and it is meant to be that way cos when i enable one chip, I disable the other one

     

    do you know how could i solve this ?

     

    also i get tons of warnings but i am not going to list them all,

    is there a page where i can find a list of errors/warnings and how to solve them ?

     

    thx

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  • Former Member
    Former Member over 11 years ago

    Hi Rompel,
    Click on the "show" option in the toolbar (denoted by an "eye" symbol) and check for the connectivity. If connectivity is there then it will be seen in light green color , so check whether all the pins are connected properly or not. Also try putting junctions (green dot in toolbar) at junctions. This had helped me many times. Moreover, u can check for pin overlaps bcoz many times pins overlap with wires which are not visible when u see the whole circuit, you have to zoom in to see the components legs and see if they are overlapping.

     

    Regards,
    Dishant Mehta

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  • Former Member
    Former Member over 11 years ago in reply to Former Member

    i am pretty sure that eagle is complaining about two outputs being linked together, witch (in general) is not meant to be in an electronic schema

    it is not a design (junction/wires/pin overlap) issue

     

    but thanks i'll keep your advices in mind :-)

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  • autodeskguest
    autodeskguest over 11 years ago in reply to Former Member

    rompel stilchen wrote:

     

    ok thanks mate

     

    but now i got another problem, "More than one output pin on net..."

     

    i use 2 x 4067 multiplexers having with their output being either a

    regular output or being set as high impedance output

    so both outputs are linked to the same connector and it is meant to be

    that way cos when i enable one chip, I disable the other one

     

    do you know how could i solve this ?

     

    have a look at the direction the relevant pins are set to in the

    symbol (library editor).

    If they are set to 'OUT', multiple pins of that sort will generate a

    ERC error.

    Should be IO or HIZ (see help pin for more info on possible direction

    settings).

    --

     

    Lorenz

     

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