Less cryptic layer setup

Am 27.10.2012 15:10, schrieb Chuck Huber:

There really is no need to even ask whether or not an insulating layer

is core or prepreg, nor is there a need to define the thicknesses of

each layer.  This is something that goes in a README file when the

gerbers are sent to the board house.

Due to Gerber being SO old and SO bad and SO difficult to check and

needing SO much additional work like readme files etc., we NEVER send

the billions of Gerber files including hand-made readme, but just the

one EAGLE board file (well, OK, sometimes plus a SMALL readme). It's SO

easy. AND it works. Please leave all necessary information in the board

file.

It would be even nicer if ADDITIONAL layer information could be set up

there, e.g.

  - solder stop: yes/no, bottom/top, colour

  - silkscreen print: yes/no, bottom/top, colour

  - copper finish: tin HAL, chemical tin, chemical gold, etc.

  - specified impedance layers

Since these things cannot ALL be defined by combo boxes etc., some

REMARKS field would be appreciated. This would make it possible to have

ALL board information in the file, and not distributed over EAGLE files,

readme, etc.

Andreas Weidner

Am 28.10.2012 02:06, schrieb Warren Brayshaw:

"Chuck Huber"  wrote

May I suggest coming up with a less cryptic method of setting up layers in

the DRC?  Perhaps a front-end or a wizard that would set the setup line.

 

Just right off the top of my head, have several text boxes that ask

pertinent questions:

 

Active layers: 1,2,3,14,15,16

Via connections: All

Blind Vias: 1-2-3,14-15-16

Buried Vias: 2-3,14-15

 

A dash represents a connection between layers.  In the above example, blind

vias are defined to connect layer 1, 2, and 3, and to connect layers 14,15,

and 16.  Buried vias connect layers 2 and 3, and connect layers 14 and 15.

 

There really is no need to even ask whether or not an insulating layer is

core or prepreg, nor is there a need to define the thicknesses of each

layer.  This is something that goes in a README file when the gerbers are

sent to the board house.

 

I wonder if this could be done in a ULP.

 

Best regards,

     - Chuck

 

>

Hi Chuck

 

You do need to understand the manufacturing process so you can economically

define the core/prepreg order. The stack/layer thicknesses matters with

microvias so you need to be aware of this when designing your board.

You can layout a PCB or design a PCB with the same layout. They can produce

very different results.

 

Describing the layer lay-up and various vias initially appears daunting. The

Manual covers it quite well.

You do need to understand the manufacturing techniques/process order for a

multi layer board so read that elsewhere.

 

Be aware that you can likely specify your layer/drill requirements more than

one way.Understanding the likely order the manufacturer will perform the

drill /plate/laminate steps makes defining the formula easier.

For the core /prepreg lay up chosen lower down your example can be attained

with either;

((1(2*3))((14*15)+16))

 

One needs to establish is a technique and I have not seen one demonstrated.

Likely there is a YouTube demonstration.

 

1) Draw what you want on paper with core and prepreg determined.

For your 6 layer board example lets use:

 

prepreg (with copper on the top side)

core

prepreg (only)

core

prepreg (with copper on the bottom side)

 

2) Define the "layers" the  buried vias will be involved with (Buried Vias:

2-3,14-15). The manufacture needs to process these first as well. These are

layers attached to core laminate, hence the "*" sign.

     2*3

     14*15

3) State these two layers are fully drilled (the buried via/drill) by adding

parenthesis. This is exactly what the manufacturer is doing at this point.

     (2*3)

     (14*15)

4) Join each of the these two cores to a prepreg with an outer copper layer

     1+(2*3)

     (14*15)+16

5) The blind vias are drilled and plated at this point. Not a controlled

depth blind via drill (expensive) but a cheaper "all the way through" drill

of each of our two stacks, so add this instruction (parenthesis) to the

formulas.

     (1+(2*3))

     ((14*15)+16)

5) Next , join these to stacks together with bare prepreg. "+"

     (1(2*3))((14*15)+16)

6) Finally specify the vias that go "all the way through" from top to

bottom, further parenthesis around the full stack.

     ((1(2*3))((14*15)+16))

 

Back to your suggestion/request:

It would be of value if there was a simple drop down selection for many of

the common requirements, say up to 6 layers. Beyond that the builds would

likely become more bespoke and creating a custom formula appropriate.

The copper and core thickness settings would still need to be addressed and

these need to be attained/verified from the board house.

 

HTH

Warren

 

>

>

>

Hi Warren,

I must admit, I usually do it like Chuck suggested and just check about

the details with the board house.

BUT I like the way you explained the process so I would suggest that

cadsoft uses it as an example to place in the manual/tutorial

--

Mit freundlichen Grüßen / With best regards

Joern Paschedag

"Chuck Huber"  wrote

May I suggest coming up with a less cryptic method of setting up layers in

the DRC?  Perhaps a front-end or a wizard that would set the setup line.

Just right off the top of my head, have several text boxes that ask

pertinent questions:

Active layers: 1,2,3,14,15,16

Via connections: All

Blind Vias: 1-2-3,14-15-16

Buried Vias: 2-3,14-15

A dash represents a connection between layers.  In the above example, blind

vias are defined to connect layer 1, 2, and 3, and to connect layers 14,15,

and 16.  Buried vias connect layers 2 and 3, and connect layers 14 and 15.

There really is no need to even ask whether or not an insulating layer is

core or prepreg, nor is there a need to define the thicknesses of each

layer.  This is something that goes in a README file when the gerbers are

sent to the board house.

I wonder if this could be done in a ULP.

Best regards,

    - Chuck

Hi Chuck

You do need to understand the manufacturing process so you can economically

define the core/prepreg order. The stack/layer thicknesses matters with

microvias so you need to be aware of this when designing your board.

You can layout a PCB or design a PCB with the same layout. They can produce

very different results.

Describing the layer lay-up and various vias initially appears daunting. The

Manual covers it quite well.

You do need to understand the manufacturing techniques/process order for a

multi layer board so read that elsewhere.

Be aware that you can likely specify your layer/drill requirements more than

one way.Understanding the likely order the manufacturer will perform the

drill /plate/laminate steps makes defining the formula easier.

For the core /prepreg lay up chosen lower down your example can be attained

with either;

((1(2*3))((14*15)+16))

One needs to establish is a technique and I have not seen one demonstrated.

Likely there is a YouTube demonstration.

1) Draw what you want on paper with core and prepreg determined.

For your 6 layer board example lets use:

prepreg (with copper on the top side)

core

prepreg (only)

core

prepreg (with copper on the bottom side)

2) Define the "layers" the  buried vias will be involved with (Buried Vias:

2-3,14-15). The manufacture needs to process these first as well. These are

layers attached to core laminate, hence the "*" sign.

    2*3

    14*15

3) State these two layers are fully drilled (the buried via/drill) by adding

parenthesis. This is exactly what the manufacturer is doing at this point.

    (2*3)

    (14*15)

4) Join each of the these two cores to a prepreg with an outer copper layer

    1+(2*3)

    (14*15)+16

5) The blind vias are drilled and plated at this point. Not a controlled

depth blind via drill (expensive) but a cheaper "all the way through" drill

of each of our two stacks, so add this instruction (parenthesis) to the

formulas.

    (1+(2*3))

    ((14*15)+16)

5) Next , join these to stacks together with bare prepreg. "+"

    (1(2*3))((14*15)+16)

6) Finally specify the vias that go "all the way through" from top to

bottom, further parenthesis around the full stack.

    ((1(2*3))((14*15)+16))

Back to your suggestion/request:

It would be of value if there was a simple drop down selection for many of

the common requirements, say up to 6 layers. Beyond that the builds would

likely become more bespoke and creating a custom formula appropriate.

The copper and core thickness settings would still need to be addressed and

these need to be attained/verified from the board house.

HTH

Warren