Looking for PowerPAK S08 Footprint (Vishay Si7460 Mosfet)

Jordan Whitley wrote:

Hello all!

I am in desperate need of a footprint for a MOSFET I am designing a

board with, and have been unable to locate one thus far. The specific

part that I am using is a Vishay Siliconix Si7460DP N channel MOSFET in

a PowerPAK SO8 package. Here is a link to the part and the datasheet for

the MOSFET.

 

http://www.newark.com/vishay-siliconix/si7460dp-t1-ge3/n-ch-

mosfet/dp/64R4909?in_merch=Popular%20Products

 

http://www.vishay.com/docs/72126/si7460dp.pdf

 

If anyone could give me a hand with this I would greatly appreciate it.

in the datasheet on page 11 is a "recommended minimum" footprint; that page

is a quote from the app-note 826

(http://www.vishay.com/docs/72286/an826.pdf), in which also the dual pad

footprint is shown - or is the question, how much bigger than "minimum" is

useful?

Gruss, Matthias Dingeldein

--

Guillotinen sind nicht reziprok, aber das macht nix,

die werden eh nur fuer die Hinrichtung verwendet

Hello,

Thank you for taking your time to reply to my question. I am going to be using the single MOSFET package, for a section of my DC/DC boost controller in my switching power supply. I have used some HVSON-8 parts before and the footprint was the recommended one from the datasheet, it was not any bigger than it stated. I am just looking for the actual footprint, I have only done very basic footprints in Eagle and I am not confident in my ability to create a footprint for this pacakge. I am trying to locate someone who has this footprint that would not mind letting me use it. I do not think I need to increase the size of the pads, because I will be heatsinking the device with a large copper pour. Thanks again for your reply, it is greatly appreciated, let me know if I can provide any more information.

Anybody have any information or any insight regarding this specific foot print? Any and all help is greatly appreciated!

Jordan Whitley wrote:

Thank you for taking your time to reply to my question.

you're welcome

I am just looking for the actual

footprint, I have only done very basic footprints in Eagle and I am not

confident in my ability to create a footprint for this pacakge.

I have no experience, too. So I answered with the appnote I found and hoped,

someone else might connect this official data with the best-practice on the

pcb (which I don't know, and which might be different from theory).

Perhaps the package has other, more common names? I remember having trouble

finding a DPAK outline, until i realized its the same as TO252...

Gruss, Matthias Dingeldein

--

Guillotinen sind nicht reziprok, aber das macht nix,

die werden eh nur fuer die Hinrichtung verwendet

Il 11/04/2013 05:08, Jordan Whitley ha scritto:

Anybody have any information or any insight regarding this specific foot

print? Any and all help is greatly appreciated!

Hello.

Here some advice, go and look into the very nice libraries Bob Starr is

sharing in his internet pages http://www.bobstarr.net/downloads.shtml.

See the attached image of what can be found from there in the

transistor-fet.lbr, downloadable from the web-site. Might be enough, at

least a good starting point to make your own.

Kim

Attachments:

Dude! Thank you sooo much! This is EXACTLY what I was looking for, this is a fantastic library! Great find! This is perfect man, thanks again very much, you just made my entire weekend just now.

Dude! Thank you sooo much! This is EXACTLY what I was looking for, this

is a fantastic library! Great find! This is perfect man, thanks again

very much, you just made my entire weekend just now.

No problem, I'm just the postman

Thank Bob for having done all the hard work.

I know this is an old post. The link no longer works. Do you know if this component layout for Eagle v6 (pre autodesk) is still avialable?

Try

bobstarr.net | Downloads

The original link had picked up an additional 's'

HTH
Warren