Silk & Stop Mask

On 05/21/2013 09:17 AM, Guy Drieghe-D. wrote:

Using Eurocircuits' (BE) Design Rules, I get errors for Stop Masks

conflicting with the tPlace silkscreen.

I wonder if I simply can ignore these, or have to wiggle & wriggle the silk

out of the way (somehow) ?

Most board houses will mask the silk screen layer off of the solder mask

so that nothing gets on the bare copper.  It's not a fatal error to the

board house, but it will lead to portions of silkscreen lettering being

absent.

Your best bet is to display the stop layer and smash the components to

move the reference designator off of the mask.  I generally give it

about .005 in clearance since the precision of the mask is less

stringent than other layers, like copper and drills.

To reduce the DRC errors, all you have to do is turn the mask layers off

before running the DRC.

HTH,

    - Chuck

Chuck Huber wrote on Tue, 21 May 2013 16:04

On 05/21/2013 09:17 AM, Guy Drieghe-D. wrote:

Using Eurocircuits' (BE) Design Rules, I get errors for Stop Masks

conflicting with the tPlace silkscreen.

I wonder if I simply can ignore these, or have to wiggle & wriggle

the silk

out of the way (somehow) ?

 

Most board houses will mask the silk screen layer off of the solder

mask

so that nothing gets on the bare copper.  It's not a fatal error to

the

board house, but it will lead to portions of silkscreen lettering

being

absent.

 

Your best bet is to display the stop layer and smash the components to

move the reference designator off of the mask.  I generally give it

about .005 in clearance since the precision of the mask is less

stringent than other layers, like copper and drills.

 

To reduce the DRC errors, all you have to do is turn the mask layers

off

before running the DRC.

 

HTH,

    - Chuck

Hi Chuck, thanks for the swift answer.

Components are already smashed, but there's not much room to move the

silkscreen printings (mostly values). It's a very dense board...

I'm not sure if I understand your note about the DRC-error reducing.

I placed the silkscreen markings with mask layers off, and indeed didn't

get errors. Makes sense.

It's just the Stop Mask layer which throws up errors, but I reckon I need

to take it into account for fabrication, so, turning them off is kinda

cheating myself, isn't it ?

cheers,

_g

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

Chuck Huber wrote on Tue, 21 May 2013 16:04

On 05/21/2013 09:17 AM, Guy Drieghe-D. wrote:

Using Eurocircuits' (BE) Design Rules, I get errors for Stop Masks

conflicting with the tPlace silkscreen.

I wonder if I simply can ignore these, or have to wiggle & wriggle

the silk

out of the way (somehow) ?

 

Most board houses will mask the silk screen layer off of the solder

mask

so that nothing gets on the bare copper.  It's not a fatal error to

the

board house, but it will lead to portions of silkscreen lettering

being

absent.

 

Your best bet is to display the stop layer and smash the components to

move the reference designator off of the mask.  I generally give it

about .005 in clearance since the precision of the mask is less

stringent than other layers, like copper and drills.

 

To reduce the DRC errors, all you have to do is turn the mask layers

off

before running the DRC.

 

HTH,

    - Chuck

Hi Chuck, thanks for the swift answer.

Components are already smashed, but there's not much room to move the

silkscreen printings (mostly values). It's a very dense board...

I'm not sure if I understand your note about the DRC-error reducing.

I placed the silkscreen markings with mask layers off, and indeed didn't

get errors. Makes sense.

It's just the Stop Mask layer which throws up errors, but I reckon I need

to take it into account for fabrication, so, turning them off is kinda

cheating myself, isn't it ?

cheers,

_g

--

Web access to CadSoft support forums at www.eaglecentral.ca.  Where the CadSoft EAGLE community meets.

On 05/21/2013 10:27 AM, Guy Drieghe-D. wrote:

Chuck Huber wrote on Tue, 21 May 2013 16:04

...

To reduce the DRC errors, all you have to do is turn the mask layers

off

before running the DRC.

 

HTH,

    - Chuck

 

Hi Chuck, thanks for the swift answer.

 

Components are already smashed, but there's not much room to move the

silkscreen printings (mostly values). It's a very dense board...

 

I'm not sure if I understand your note about the DRC-error reducing.

I placed the silkscreen markings with mask layers off, and indeed didn't

get errors. Makes sense.

It's just the Stop Mask layer which throws up errors, but I reckon I need

to take it into account for fabrication, so, turning them off is kinda

cheating myself, isn't it ?

Well... yeah... sort of.

I'm suggesting that you turn the mask layer on to place the reference

designator in such a position that it does not overlap the mask

elements.  However, Many of the components in the library have elements

on the xPlace layer that WILL overlap the mask.  If you did a DRC with

the mask layer displayed, it would generate prolific errors regarding

these overlaps.  The sheer number will tend to obfuscate the mask errors

to which you want to pay attention, specifically those generated by

xName overlaps.

What I generally do is to turn all layers off except Dimension, Pads,

Vias, xName, xPlace, and xStop.  With this display configuration it's

easy to place the reference designators so that drills and masks won't

chop them up.

Granted, your silk screen will include the xPlace layer (component

outline, pin 1 desginator, etc).  But you can approve these errors since

the board house will remove any silk screen over mask areas.  Having

these chopped up by the board house is not as critical to the finish of

the board.

HTH,

    - Chuck