Actions
Forum Thread Details
  • State Not Answered
  • Replies 9 replies
  • Subscribers 180 subscribers
  • Views 1517 views
  • Users 0 members are here
Related

Copper Pour Around Vias

therrm266

I'm trying to perform a copper pour around a via but it appears to be acting oddly.

image

I would expect the copper pour to wrap around the via, making a circle with a clearance set by my DRC options.

 

This becomes a bigger problem when getting a power pour under a BGA with vias; the hexagon shapes waste space.

image

 

Does anybody know why it is creating a hexagon shape instead? I have tried adjusting my DRC, changing width of poly, and some other options, but I haven't had any luck.

 

Any suggestions would be greatly appreciated!

 

Thanks!

Parents
  • 0

    Thanks for all the responses!

     

    Firstly I misspoke, they are octagons, not hexagons. With that being said, here are some more details about what is going on:

     

    • The vias are 18/8, and I might use 16/8 vias.
    • The width of the poly is set to 1 mil. I can adjust the poly to anything and it didn't make a difference.
    • Since these are vias, I can't adjust them as easily as I could with a part in the library.

     

    I know it might look minor, but in the case when you have an FPGA that can pull close to 10 Amps any amount of copper helps. The red sections in the image below show the areas that I'm missing because Eagle is pouring the copper as an octagon instead of a circle.  Each one of those marks is roughly a mil, and when the opening between the vias is only approximately 6 mils, that is two mils I'm missing between them. Proportionally that is quite a bit.

     

    image

     

    Again, thank you all for the responses! Hopefully we can figure out a solution.

Reply
  • 0

    Thanks for all the responses!

     

    Firstly I misspoke, they are octagons, not hexagons. With that being said, here are some more details about what is going on:

     

    • The vias are 18/8, and I might use 16/8 vias.
    • The width of the poly is set to 1 mil. I can adjust the poly to anything and it didn't make a difference.
    • Since these are vias, I can't adjust them as easily as I could with a part in the library.

     

    I know it might look minor, but in the case when you have an FPGA that can pull close to 10 Amps any amount of copper helps. The red sections in the image below show the areas that I'm missing because Eagle is pouring the copper as an octagon instead of a circle.  Each one of those marks is roughly a mil, and when the opening between the vias is only approximately 6 mils, that is two mils I'm missing between them. Proportionally that is quite a bit.

     

    image

     

    Again, thank you all for the responses! Hopefully we can figure out a solution.

Children