Eagle 5.11 question regarding ground interlayer?
How do I keep the copper away from a TO220 transistor area with in the Ground layer?
Eagle 5.11 question regarding ground interlayer?
How do I keep the copper away from a TO220 transistor area with in the Ground layer?
"Bill Basham" <communitymanager@premierfarnell.com> wrote in message
news:800474576.12411324066801172.JavaMail.jive@flcspu-csapp-01.premierfarnell.com...
Eagle 5.11 question regarding ground interlayer?
How do I keep the copper away from a TO220 transistor area with in the
Ground layer?
If you are talking about using a ground plane and keeping the ground away
from the transistor's tab, I use a polygon of a different ranking. My
predecessor had a love of using rectangles for the heatsink area. Trouble
with that is that rectangles (iirc) can not have a signal name. It works but
has design rule violations that you have to accept then. There should also
be a keepout area under the tab.
"Bill Basham" <communitymanager@premierfarnell.com> wrote in message
news:800474576.12411324066801172.JavaMail.jive@flcspu-csapp-01.premierfarnell.com...
Eagle 5.11 question regarding ground interlayer?
How do I keep the copper away from a TO220 transistor area with in the
Ground layer?
If you are talking about using a ground plane and keeping the ground away
from the transistor's tab, I use a polygon of a different ranking. My
predecessor had a love of using rectangles for the heatsink area. Trouble
with that is that rectangles (iirc) can not have a signal name. It works but
has design rule violations that you have to accept then. There should also
be a keepout area under the tab.